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An apparatus and method for high-voltage transient blocking employing a transient blocking unit (TBU) that has at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device such that a transient alters a bias voltage Vp of the p-channel device and a bi

An apparatus and method for high-voltage transient blocking employing a transient blocking unit (TBU) that has at least one depletion mode n-channel device interconnected with at least one depletion mode p-channel device such that a transient alters a bias voltage Vp of the p-channel device and a bias voltage Vn of the n-channel device in concert. Specifically, the bias voltages are altered such that the p-channel device and n-channel device mutually switch off to block the transient. The depletion mode n-channel device employs a set of cascaded low-voltage depletion mode field effect transistors (FETs) such as metal-oxide-silicon field effect transistors (MOSFETs) connected source-to-drain to achieve the desired high-voltage operation of the TBU.

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We claim: 1. An apparatus for transient blocking comprising a transient blocking unit having at least one depletion mode n-channel 3-terminal network interconnected with at least one depletion mode p-channel 3-terminal network such that a transient alters a bias voltage Vp of said depletion mode p-

We claim: 1. An apparatus for transient blocking comprising a transient blocking unit having at least one depletion mode n-channel 3-terminal network interconnected with at least one depletion mode p-channel 3-terminal network such that a transient alters a bias voltage Vp of said depletion mode p-channel 3-terminal network and a bias voltage Vn of said depletion mode n-channel 3-terminal network, whereby said depletion mode p-channel 3-terminal network and said depletion mode n-channel 3-terminal network mutually switch off to block said transient, and wherein at least one of said at least one depletion mode n-channel 3-terminal network and said at least one depletion mode p-channel 3-terminal network comprises a set of two or more low-voltage depletion mode field effect transistors connected in source-to-drain series. 2. The apparatus of claim 1, wherein said set is included in said depletion mode n-channel 3-terminal network. 3. The apparatus of claim 2, wherein said set comprises at least two low-voltage depletion mode devices selected from the group consisting of field effect transistors and junction gate field effect transistors. 4. The apparatus of claim 3, wherein said at least two low-voltage depletion mode devices comprise two low-voltage metal-oxide-silicon field effect transistors. 5. The apparatus of claim 4, wherein said set further comprises a means for providing a bias to a gate of a first of said two metal-oxide-silicon field effect transistors. 6. The apparatus of claim 5, wherein said means comprises an avalanche diode. 7. The apparatus of claim 4, wherein said two low-voltage metal-oxide-silicon transistors have equal pinch-off voltages. 8. The apparatus of claim 3, wherein said two low-voltage depletion mode devices are stacked. 9. The apparatus of claim 8, further comprising a merged structure integrating said two low-voltage depletion mode devices and a biasing arrangement. 10. The apparatus of claim 9, wherein said biasing arrangement comprises an element selected from the group consisting of resistors and avalanche diodes. 11. A method for transient blocking comprising: a) providing a transient blocking unit having at least one depletion mode n-channel 3-terminal network interconnected with at least one depletion mode p-channel 3-terminal network such that a transient alters a bias voltage Vp of said depletion mode p-channel 3-terminal network and a bias voltage Vn of said depletion mode n-channel 3-terminal network, whereby said depletion mode p-channel 3-terminal network and said depletion mode n-channel 3-terminal network mutually switch off to block said transient; b) including a set of low-voltage depletion mode field effect transistors connected in source-to-drain series in at least one of said at least one depletion mode n-channel 3-terminal network and said at least one depletion mode p-channel 3-terminal network. 12. The method of claim 11, wherein said set is included in said at least one depletion mode n-channel 3-terminal network. 13. The method of claim 12, wherein said set comprises two low-voltage depletion mode devices selected from the group consisting of field effect transistors and junction gate field effect transistors. 14. The apparatus of claim 13, further comprising stacking said two low-voltage depletion mode devices. 15. The method of claim 13, further comprising providing a bias to a gate of a first transistor of said two low-voltage depletion mode devices.