Process for fabricating films of uniform properties on semiconductor devices
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/31
H01L-021/469
출원번호
UP-0731319
(2000-12-06)
등록번호
US-7651956
(2010-02-24)
발명자
/ 주소
Mercaldi, Garry Anthony
Powell, Don Carl
출원인 / 주소
Micron Technology, Inc.
대리인 / 주소
TraskBritt
인용정보
피인용 횟수 :
0인용 특허 :
28
초록▼
A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The process includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature wit
A process for forming a thin layer exhibiting a substantially uniform property on an active surface of a semiconductor substrate. The process includes varying the temperature within a reaction chamber while a layer of a material is formed upon the semiconductor substrate. Varying the temperature within the reaction chamber facilitates temperature uniformity across the semiconductor wafer. As a result, a layer forming reaction occurs at a substantially consistent rate over the entire active surface of the semiconductor substrate. The process may also include oscillating the temperature within the reaction chamber while a layer of a material is being formed upon a semiconductor substrate.
대표청구항▼
What is claimed is: 1. A process for substantially equalizing a temperature across a semiconductor substrate, comprising: positioning the semiconductor substrate in a reaction chamber; and continuously varying the temperature within the reaction chamber, including oscillating the temperature within
What is claimed is: 1. A process for substantially equalizing a temperature across a semiconductor substrate, comprising: positioning the semiconductor substrate in a reaction chamber; and continuously varying the temperature within the reaction chamber, including oscillating the temperature within the reaction chamber at a substantially constant frequency, to substantially equalize the temperature across the semiconductor substrate. 2. The process of claim 1, wherein continuously varying comprises increasing the temperature within the reaction chamber. 3. The process of claim 2, further comprising cycling the temperature within the reaction chamber following increasing, cycling including decreasing and re-increasing the temperature within the reaction chamber at least once. 4. The process of claim 1, wherein continuously varying comprises decreasing the temperature within the reaction chamber. 5. The process of claim 4, further comprising cycling the temperature within the reaction chamber following decreasing, cycling including increasing and re-decreasing the temperature within the reaction chamber at least once. 6. The process of claim 1, further comprising oscillating the temperature during a temperature ramp-up prior to a formation of a layer of a material. 7. The process of claim 1, further comprising oscillating the temperature during a temperature ramp-down subsequent to a formation of a layer of a material. 8. The process of claim 1, further comprising oscillating the temperature during formation of a layer of a material. 9. The process of claim 1, further comprising altering an overall temperature trend from a first phase to a second phase. 10. The process of claim 1, further comprising altering a frequency of the oscillating. 11. The process of claim 1, further comprising altering a magnitude of the oscillating. 12. The process of claim 1, further comprising optimizing a frequency of the oscillating responsive to an initial growth pattern of a layer of a material to enhance uniformity of a property of the layer. 13. The process of claim 12, wherein optimizing the frequency of the oscillating comprises changing a property of the layer that comprises at least one of thickness, sheet resistance, reflectivity, transmissivity, absorptivity, and dielectric constant. 14. The process of claim 1, further comprising monitoring an initial growth pattern of a layer of a material. 15. The process of claim 14, further comprising optimizing a magnitude of oscillating in response to monitoring to enhance uniformity of a property of the layer. 16. The process of claim 15, wherein optimizing the magnitude of oscillating comprises enhancing a property of the layer that comprises at least one of thickness, sheet resistance, reflectivity, transmissivity, absorptivity, etch characteristics, dopant distribution, and dielectric constant. 17. The process of claim 1, further comprising monitoring an overall growth pattern of a layer of a material. 18. The process of claim 17, further comprising altering the temperature within the reaction chamber responsive to monitoring. 19. The process of claim 17, further comprising altering a rate of varying responsive to monitoring. 20. The process of claim 17, further comprising cycling the temperature within the reaction chamber following continuously varying. 21. The process of claim 1, further comprising monitoring the temperature of the semiconductor substrate. 22. The process of claim 1, wherein varying the temperature is effected by altering a characteristic of power input into the reaction chamber. 23. The process of claim 22, wherein the power characteristic is frequency, amplitude or phase. 24. A process for maintaining a uniform reaction rate over a surface of a semiconductor substrate, comprising: placing the semiconductor substrate in a reaction chamber; introducing at least one reactant into the reaction chamber; and continuously varying a temperature within the reaction chamber during an entire extent of introducing at least one reactant into the reaction chamber to facilitate maintenance of the uniform reaction rate as a reaction involving the at least one reactant results in the deposition of at least one material onto the surface of the substrate, the continuously varying including oscillating the temperature within the reaction chamber. 25. The process of claim 24, wherein continuously varying includes increasing the temperature within the reaction chamber. 26. The process of claim 25, wherein continuously varying includes cycling the temperature within the reaction chamber following increasing, cycling including decreasing and re-increasing the temperature within the reaction chamber at least once. 27. The process of claim 24, wherein continuously varying includes decreasing the temperature within the reaction chamber. 28. The process of claim 27, wherein continuously varying includes cycling the temperature within the reaction chamber following decreasing, cycling including increasing and re-decreasing the temperature within the reaction chamber at least once. 29. The process of claim 24, further comprising effecting oscillating during a temperature ramp-up prior to introducing. 30. The process of claim 24, further comprising effecting oscillating during a temperature ramp-down subsequent to introducing. 31. The process of claim 24, further comprising effecting oscillating during a substantially steady-state temperature trend. 32. The process of claim 24, wherein oscillating comprises varying the temperature at a constant frequency. 33. The process of claim 24, further comprising altering an overall temperature trend from a first phase to a second phase. 34. The process of claim 24, further comprising altering a frequency of oscillating. 35. The process of claim 24, further comprising altering a magnitude of oscillating. 36. The process of claim 24, further comprising optimizing a frequency of oscillating responsive to an initial growth pattern of a layer of a material upon the semiconductor substrate to enhance uniformity of a property of the layer. 37. The process of claim 36, wherein optimizing the frequency of oscillating comprises enhancing a property of the layer that comprises at least one of thickness, sheet resistance, reflectivity, transmissivity, absorptivity, etch characteristics, dopant distribution, and dielectric constant. 38. The process of claim 36, further comprising forming a material layer exhibiting at least one substantially uniform property on the semiconductor substrate. 39. The process of claim 38, wherein optimizing the frequency of oscillating comprises enhancing the at least one substantially uniform property of the layer, the at least one substantially uniform property including at least one of thickness, sheet resistance, reflectivity, transmissivity, absorptivity, etch characteristics, dopant distribution, and dielectric constant. 40. The process of claim 24, further comprising monitoring an initial growth pattern of a layer of a material upon the semiconductor substrate. 41. The process of claim 40, further comprising optimizing a magnitude of oscillating in response to the initial growth pattern of the layer of the material upon the semiconductor substrate to enhance a substantially uniform property of the layer. 42. The process of claim 41, wherein optimizing the magnitude of the oscillating comprises enhancing a substantially uniform property of the layer that comprises at least one of thickness, sheet resistance, reflectivity, transmissivity, absorptivity, etch characteristics, dopant distribution, and dielectric constant. 43. The process of claim 24, further comprising monitoring an overall growth pattern of a layer of a material on the semiconductor substrate. 44. The process of claim 43, further comprising altering the temperature within the reaction chamber responsive to monitoring. 45. The process of claim 43, further comprising altering a rate of varying responsive to monitoring. 46. The process of claim 43, further comprising cycling the temperature within the reaction chamber following continuously varying. 47. The process of claim 24, further comprising monitoring the temperature of the semiconductor substrate. 48. The process of claim 24, wherein continuously varying is effected by altering a frequency, an amplitude, or a phase power characteristic. 49. A process for substantially equalizing a temperature across a semiconductor substrate, comprising: positioning the semiconductor substrate in a reaction chamber; oscillating the temperature within the reaction chamber to substantially equalize the temperature across the semiconductor substrate; and monitoring an initial growth pattern of a layer of a material formed on the semiconductor substrate. 50. The process of claim 49, further comprising optimizing the oscillating in response to the monitoring. 51. A process for substantially equalizing a temperature across a semiconductor substrate, comprising: positioning the semiconductor substrate in a reaction chamber; continuously varying the temperature within the reaction chamber to substantially equalize the temperature across the semiconductor substrate; “following the continuously varying the temperature,” cycling the temperature within the reaction chamber; and monitoring an overall growth pattern of a layer of a material on the semiconductor substrate. 52. The process of claim 51, wherein the temperature is continuously varied in response to the monitoring. 53. The process of claim 51, wherein a rate at which the temperature is varied is altered in response to the monitoring.
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