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An apparatus for detecting a temperature using transistors includes a plurality of temperature detecting units that become selectively active according to predetermined temperature intervals; and a detection signal output unit that generates detection signals according to the signals transmitted by

An apparatus for detecting a temperature using transistors includes a plurality of temperature detecting units that become selectively active according to predetermined temperature intervals; and a detection signal output unit that generates detection signals according to the signals transmitted by the plurality of temperature detecting units, and outputs the detection signals.

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What is claimed is: 1. An apparatus for detecting temperature using transistors, comprising: a plurality of temperature detecting units that become selectively active according to predetermined temperature intervals; and a pulse generating unit that sets prescribed pulse widths to the temperature i

What is claimed is: 1. An apparatus for detecting temperature using transistors, comprising: a plurality of temperature detecting units that become selectively active according to predetermined temperature intervals; and a pulse generating unit that sets prescribed pulse widths to the temperature intervals detected by the plurality of temperature detecting units, generates pulse of the prescribed width according to a signal transmitted by an active temperature detecting unit among the plurality of temperature detecting units, and outputs the pulse, wherein the plurality of temperature detecting units detect different temperature intervals, respectively and only the temperature detecting unit having the temperature interval including a present temperature is active, wherein each of the plurality of temperature detecting units includes: a first temperature detecting section that generates an enable signal at the lower temperature limit or above in a set temperature interval; a second temperature detecting section that generates an enable signal at the upper temperature limit or below in the set temperature interval; and a signal generating section that extracts overlapping intervals between a voltage level of the enable signal from the first temperature detecting section and a voltage level of the enable signal output from the second temperature detecting section and generates an output signal. 2. The apparatus for detecting temperature of claim 1, wherein the first temperature detecting section includes: a linear voltage driver that outputs an enable signal at the lower temperature limit or above in the set temperature interval; a level shifter that amplifies an output signal of the linear voltage driver; a saturation voltage driver that outputs a signal of a predetermined level independent of the variation in temperature; and a comparator that compares an output signal level of the level shifter with an output signal level of the saturation voltage driver, and outputs an enable signal when the output signal level of the level shifter is higher than the output signal level of the saturation voltage driver, and outputs a disable signal when the output signal level of the level shifter is lower than the output signal level of the saturation voltage driver. 3. The apparatus for detecting temperature using transistors of claim 2, wherein the linear voltage driver includes: a first transistor that has a gate terminal applied with a driving voltage, a drain terminal applied with a reference voltage, and a source terminal connected to a first node, and operates in a linear region; and a second transistor that has a gate terminal applied with the reference voltage, a source terminal connected to a ground, and a drain terminal connected to the first node, and operates in a saturation region, and an output signal is generated at the first node. 4. The apparatus for detecting temperature of claim 3, wherein the driving voltage is a core voltage. 5. The apparatus for detecting temperature of claim 3, wherein the length of the first transistor is adjusted such that a threshold voltage of the first transistor is rapidly reduced at the lower temperature limit or above or the upper limit temperature or more in the temperature interval. 6. The apparatus for detecting temperature of claim 2, wherein the level shifter includes: a differential amplifier that is inputted with the output signal of the linear voltage driver and applied with a driving voltage; a transistor that is inputted with an output signal of the differential amplifier and applied with the driving voltage; and a resistor array that causes the output signal of the linear voltage driver to be amplified according to a prescribed ratio. 7. The apparatus for detecting temperature of claim 6, wherein the driving voltage is a core voltage. 8. The apparatus for detecting temperature of claim 2, wherein the saturation voltage driver includes: a first transistor that has a gate terminal and a drain terminal applied with a driving voltage, and a source terminal connected to a first node; and a second transistor that has a gate terminal applied with a reference voltage, a source terminal connected to a ground, and a drain terminal connected to the first node, and an output signal is generated at the first node. 9. The apparatus for detecting temperature of claim 8, wherein the driving voltage is a core voltage. 10. The apparatus for detecting temperature of claim 2, wherein the comparator is composed of a differential amplifier that is inputted with the output signals of the level shifter and the saturation voltage driver and applied with the driving voltage. 11. The apparatus for detecting temperature of claim 10, wherein the driving voltage is a core voltage. 12. The apparatus for detecting temperature of claim 1, wherein the second temperature detecting section includes: a linear voltage driver that outputs an enable signal at the upper temperature limit or below in the temperature interval detected by the apparatus for detecting a temperature; a level shifter that amplifies an output signal of the linear voltage driver; a saturation voltage driver that outputs a signal of a predetermined level independent of the variation in temperature; a comparator that compares an output signal level of the level shifter with an output signal level of the saturation voltage driver, and outputs an enable signal when the output signal level of the level shifter is higher than the output signal level of the saturation voltage driver, and outputs a disable signal when the output signal level of the level shifter is lower than the output signal level of the saturation voltage driver; and an inverter that inverts the phase of the comparator output signal, and outputs the inverted signal. 13. The apparatus for detecting temperature of claim 12, wherein the linear voltage driver includes: a first transistor that has a gate terminal applied with a driving voltage, a drain terminal applied with a reference voltage, and a source terminal connected to a first node, and operates in a linear region; and a second transistor that has a gate terminal applied with the reference voltage, a source terminal connected to a ground, and a drain terminal connected to the first node, and operates in a saturation region, and an output signal is generated at the first node. 14. The apparatus for detecting temperature of claim 13, wherein the driving voltage is a core voltage. 15. The apparatus for detecting temperature of claim 13, wherein the length of the first transistor is adjusted such that a threshold voltage of the first transistor is rapidly reduced at the lower temperature limit or above or the upper limit temperature or more in the temperature interval. 16. The apparatus for detecting temperature of claim 12, wherein the level shifter includes: a differential amplifier that is inputted with the output signal of the linear voltage driver and applied with a driving voltage; a transistor that is inputted with an output signal of the differential amplifier and applied with the driving voltage; and a resistor array that causes the output signal of the linear voltage driver to be amplified according to a prescribed ratio. 17. The apparatus for detecting temperature of claim 16, wherein the driving voltage is a core voltage. 18. The apparatus for detecting temperature of claim 12, wherein the saturation voltage driver includes: a first transistor that has a gate terminal and a drain terminal applied with a driving voltage, and a source terminal connected to a first node; and a second transistor that has a gate terminal applied with a reference voltage, a source terminal connected to a ground, and a drain terminal connected to the first node, and an output signal is generated at the first node. 19. The apparatus for detecting temperature of claim 18, wherein the driving voltage is a core voltage. 20. The apparatus for detecting temperature of claim 12, wherein the comparator is composed of a differential amplifier that is inputted with the output signals of the level shifter and the saturation voltage driver and applied with the driving voltage. 21. The apparatus for detecting temperature of claim 20, wherein the driving voltage is a core voltage. 22. The apparatus for detecting temperature of claim 1, wherein the signal generating section includes a NAND gate that receives the output signals of the first temperature detecting section and the second temperature detecting section. 23. The apparatus for detecting temperature of claim 1, wherein the pulse generating unit includes: a plurality of initialization sections that correspond to the plurality of temperature detecting units and sink an initial voltage of the pulse generating unit to a ground voltage for a predetermined time; a plurality of pulse generating sections that generate, when enable signals are inputted by the initialization sections after the predetermined time, pulses of prescribed widths, and output the pulses; and a pulse output section that only outputs a pulse outputted by a pulse generating section, among the plurality of pulse generating units, which generated the pulse. 24. The apparatus for detecting temperature of claim 23, wherein the plurality of pulse generating sections output pulses of different widths when enabled. 25. The apparatus for detecting temperature of claim 23, wherein each of the plurality of initialization sections includes: a delayer that delays a power up signal instructing that power is supplied to a semiconductor integrated circuit, for a predetermined time; and a transistor that has a gate terminal inputted with an output signal of the delayer, a drain terminal connected to a ground, and a source terminal applied with the output signal of the temperature detecting unit, the source terminal being connected to a first node, and the first node, to which the output signal of the corresponding temperature detecting unit is transmitted, is connected to the corresponding pulse generating section. 26. The apparatus for detecting temperature of claim 23, wherein each of the plurality of initialization section includes: a delayer that delays the output signal of the corresponding temperature detecting unit for a predetermined time; and a transistor that has a gate terminal inputted with an output signal of the delayer, a drain terminal connected to a ground, and a source terminal connected to a first node, and the first node, to which a voltage having a potential level other than a ground voltage level is transmitted, is connected to the corresponding pulse generating section. 27. The apparatus for detecting temperature of claim 26, wherein the voltage transmitted to the first node is a core voltage. 28. The apparatus for detecting temperature of claim 23, wherein each of the plurality of pulse generating section includes: an inverter that inverts an output signal of the initialization section; a delayer that delays the output signal of the inverter for a prescribed time according to each temperature interval; and a NAND gate that is inputted with the output signal of the initialization section and the output signal of the delayer. 29. The apparatus for detecting temperature of claim 23, wherein the pulse output section has a NOR gate that is inputted with the signals outputted by the plurality of pulse generating sections.