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A method for forming conductive vias in a substrate of a semiconductor device component includes forming one or more holes, or apertures or cavities, in the substrate so as to extend only partially through the substrate. A barrier layer, such as an insulative layer, may be formed on surfaces of each

A method for forming conductive vias in a substrate of a semiconductor device component includes forming one or more holes, or apertures or cavities, in the substrate so as to extend only partially through the substrate. A barrier layer, such as an insulative layer, may be formed on surfaces of each hole. Surfaces within each hole may be coated with a seed layer, which facilitates adhesion of conductive material within each hole. Conductive material is introduced into each hole. Introduction of the conductive material may be effected by deposition or plating. Alternatively, conductive material in the form of solder may be introduced into each hole.

대표청구항 ▼

What is claimed is: 1. A method for forming a conductive via in a semiconductor device component, comprising: providing a substrate having a first surface and an opposite, second surface; forming at least one hole through the substrate, the at least one hole defined by a sidewall and extending from

What is claimed is: 1. A method for forming a conductive via in a semiconductor device component, comprising: providing a substrate having a first surface and an opposite, second surface; forming at least one hole through the substrate, the at least one hole defined by a sidewall and extending from the first surface of the substrate to the opposite, second surface of the substrate; applying a seed layer for facilitating adhesion of a conductive material to the first surface of the substrate, the opposite, second surface of the substrate and the sidewall of the at least one hole; completely removing the seed layer from the first surface and the opposite, second surface of the substrate; applying conductive material to a portion of the seed layer within the at least one hole; and introducing a filler material into a remaining space within the at least one hole. 2. The method of claim 1, wherein forming the at least one hole through the substrate is effected by at least one of laser ablation, dry etching and wet etching. 3. The method of claim 1, further comprising: cleaning the sidewall defining the at least one hole prior to applying the seed layer. 4. The method of claim 1, further comprising: forming an insulative layer on the first surface, the opposite, second surface and the sidewall defining the at least one hole prior to applying the seed layer. 5. The method of claim 1, further comprising: forming at least one bond pad overlying at least a portion of the conductive via on at least one of the first surface and the opposite, second surface after introducing the filler material. 6. The method of claim 1, wherein applying the seed layer comprises depositing conductive material using a chemical vapor deposition process, a physical vapor deposition process, an atomic layer deposition process, a plasma enhanced chemical vapor deposition process, vacuum evaporation or sputtering. 7. The method of claim 1, wherein removing the seed layer overlying the first surface and the opposite, second surface of the substrate is effected by abrasive planarization. 8. The method of claim 1, wherein applying the conductive material comprises electrolessly plating the conductive material onto the seed layer. 9. The method of claim 1, wherein introducing the filler material into the remaining space of the at least one hole comprises one of spin coating spin-on-glass into the remaining space, depositing polysilicon into the remaining space using a diffusion process or depositing solder paste or a solder into the remaining space. 10. The method of claim 1, wherein introducing the filler material comprises introducing either a conductive or a nonconductive filler material. 11. The method of claim 1, further comprising: applying a layer of resist overlying the seed layer; and after removal of the seed layer, removing the layer of resist. 12. A method for forming a conductive via in a substrate comprising: providing a substrate having a first surface and an opposite, second surface; forming at least one cavity in the first surface of the substrate, the at least one cavity extending partially through the substrate, the substrate defining cavity surfaces; forming a barrier layer on the cavity surfaces; and introducing a conductive filler material into a remaining space defined within the at least one cavity by the barrier layer. 13. The method of claim 12, further comprising: removing material of the substrate from the opposite, second surface of the substrate to a depth sufficient to expose the conductive filler material introduced into the at least one cavity. 14. The method of claim 12, wherein forming the at least one cavity in the first surface is effected by at least one of laser ablation, dry etching and wet etching. 15. The method of claim 12, further comprising: cleaning an exposed area of the substrate defining the at least one cavity prior to introducing the conductive filler material. 16. The method of claim 12, wherein forming the barrier layer comprises forming an insulative barrier. 17. The method of claim 16, wherein forming the insulative barrier comprises forming an insulative layer on the first surface and an exposed area defining the at least one cavity prior to introducing the conductive filler material. 18. The method of claim 12, further comprising: depositing a seed layer for facilitating adhesion of conductive material to the cavity surfaces and on the first surface of the substrate and an exposed area of the substrate defining the at least one cavity; and completely removing the seed layer from the first surface of the substrate, with portions of the seed layer remaining on the cavity surfaces. 19. The method of claim 18, wherein depositing the seed layer comprises depositing a conductive material using a chemical vapor deposition process, a physical vapor deposition process, an atomic layer deposition process, a plasma enhanced chemical vapor deposition process, vacuum evaporation or sputtering. 20. The method of claim 18, wherein removing portions of the seed layer overlying the first surface of the substrate is effected by abrasive planarization. 21. The method of claim 12, wherein introducing conductive filler material comprises introducing solder into the at least one cavity. 22. The method of claim 21, wherein introducing solder comprises flowing solder into the at least one cavity in a molten state. 23. The method of claim 21, wherein introducing solder comprises introducing solder into the at least one cavity by screen printing.