IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0105588
(2008-04-18)
|
등록번호 |
US-7671368
(2010-04-21)
|
우선권정보 |
KR-10-2004-0036854(2004-05-24); KR-10-2004-0037277(2004-05-25) |
발명자
/ 주소 |
- Kwak, Won-Kyu
- Kim, Keum-Nam
|
출원인 / 주소 |
- Samsung Mobile Display Co., Ltd.
|
대리인 / 주소 |
H.C. Park & Associates, PLC
|
인용정보 |
피인용 횟수 :
5 인용 특허 :
16 |
초록
▼
A capacitor including a polysilicon layer doped with impurities to be conductive, a first dielectric layer formed on the polysilicon layer, a first conductive layer formed on the first dielectric layer, a second dielectric layer formed on the first conductive layer, and a second conductive layer for
A capacitor including a polysilicon layer doped with impurities to be conductive, a first dielectric layer formed on the polysilicon layer, a first conductive layer formed on the first dielectric layer, a second dielectric layer formed on the first conductive layer, and a second conductive layer formed on the first dielectric layer. The second conductive layer is coupled to the polysilicon layer.
대표청구항
▼
What is claimed is: 1. A display device, comprising: a scan line extending in a first direction and transmitting a selection signal; a data line extending in a second direction crossing the scan line, and transmitting a data signal; and a pixel circuit coupled to the scan line and the data line, wh
What is claimed is: 1. A display device, comprising: a scan line extending in a first direction and transmitting a selection signal; a data line extending in a second direction crossing the scan line, and transmitting a data signal; and a pixel circuit coupled to the scan line and the data line, wherein the pixel circuit comprises: a first transistor having a first electrode coupled to the data line and a second electrode turned on in response to the selection signal and outputting the data signal; a first capacitor having a first electrode coupled to the second electrode of the first transistor, and charged with a voltage corresponding to the data signal; a second transistor outputting a current corresponding to a voltage stored in the first capacitor; a second capacitor having a first electrode coupled to the first electrode of the first capacitor in series; and a light emission element coupled to the second transistor, wherein a pixel area in which the pixel circuit is formed comprises: a first conductive layer having a first conductive area and a second conductive area; a first dielectric layer formed on the first conductive layer; and a second conductive layer formed on the first dielectric layer, wherein the first conductive area forms a second electrode of the first capacitor and the second conductive area forms a second electrode of the second capacitor; and wherein the second conductive layer forms the first electrode of the first capacitor and the first electrode of the second capacitor. 2. The display device of claim 1, wherein the first conductive layer is a polysilicon layer doped with impurities. 3. The display device of claim 2, a conductive type of the first conductive layer is a same conductive type of a polysilicon layer of at least one of the first transistor and the second transistor. 4. The display device of claim 2, wherein the pixel area further comprises: a second dielectric layer formed on the second conductive layer; and a power line formed on the second dielectric layer. 5. The display device of claim 4, wherein the first conductive area is coupled to the power line. 6. The display device of claim 5, wherein the power line overlaps the first conductive area and has a similar shape as the first conductive area. 7. The display device of claim 6, wherein the second conductive layer is coupled to the second electrode of the first transistor through a cavity. 8. A display panel, comprising: a scan line extending in a first direction and transmitting a selection signal; a data line extending in a second direction crossing the scan line, and transmitting a data current; and a pixel circuit coupled to the scan line and the data line, wherein the pixel circuit comprises: a first transistor turned on by the selection signal, and transmitting the data current; a second transistor outputting a current corresponding to the data current; a first capacitor coupled between a source electrode and a gate electrode of the second transistor; a second capacitor coupled between a signal control line and the gate electrode of the second transistor, and coupled to the first capacitor to control a voltage applied to the gate electrode of the second transistor; a third transistor turned on by the selection signal, and transmitting the data current to the drain electrode of the second transistor; and a light emission element coupled to the second transistor, wherein an area in which the first capacitor and the second capacitor are located in comprises: a first polysilicon layer doped with impurities to be conductive, and having a first area and a second area; a first dielectric layer formed on the first polysilicon layer; and a first conductive layer formed on the first dielectric layer, wherein the first area forms the first electrode of the first capacitor and the second area forms the first electrode of the second capacitor; and wherein the first conductive layer forms the second electrode of the first capacitor and the second electrode of the second capacitor. 9. The display panel of claim 8, wherein the area in which the first capacitor and second capacitor are located in further comprises: a second dielectric layer formed on the first conductive layer; and a second conductive layer formed on the second dielectric layer, wherein the second conductive layer is coupled to the first area of the first polysilicon layer. 10. The display panel of claim 9, wherein the second conductive layer is a power line transmitting a power voltage to the first electrode of the first capacitor and the source electrode of the second transistor. 11. The display panel of claim 8, wherein the first polysilicon layer is arranged adjacent to a side of an area in which the light emission element is provided. 12. The display panel of claim 8, wherein the first area of the first polysilicon layer is greater than the second area of the first polysilicon layer. 13. The display panel of claim 8, wherein source areas and drain areas of the first, second, and third transistors are respectively formed by second, third, and fourth polysilicon layers that are doped with impurities; and wherein the first polysilicon layer and the second polysilicon layer are doped with a same type of impurities. 14. The display panel of claim 13, wherein a doping density of the first polysilicon layer is a same doping density of at least one of the second, third, and fourth polysilicon layers. 15. The display panel of claim 8, wherein the pixel circuit further comprises a fourth transistor selectively transmitting the current outputted from the second transistor.
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