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Methods of forming metal layers using multi-layer lift-off patterns

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/44
출원번호 UP-0671018 (2007-02-05)
등록번호 US-7674701 (2010-04-21)
발명자 / 주소
  • Rinne, Glenn A.
출원인 / 주소
  • Amkor Technology, Inc.
대리인 / 주소
    Myers Bigel Sibley & Sajovec, P.A.
인용정보 피인용 횟수 : 5  인용 특허 : 173

초록

Methods of forming interconnections for an electronic device including a substrate may be provided. For example, first and second patterned layers may be formed on the substrate wherein an opening in the first and second patterned layers exposes portions of the substrate, wherein the first and secon

대표청구항

That which is claimed is: 1. A method of forming an interconnection for an electronic device including a substrate, the method comprising: forming first and second patterned layers on the substrate wherein an opening in the first and second patterned layers exposes portions of the substrate, wherei

이 특허에 인용된 특허 (173)

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  1. Cho, Moon Gi; Kim, Young Lyong; Park, Sun-Hee; Lim, Hwan-Sik, Bump structures having an extension.
  2. Arnold, Shawn X.; Gilton, Terry L.; Last, Matthew E., Methods for forming a sensor array package.
  3. Arnold, Shawn X.; Gilton, Terry L.; Last, Matthew E., Methods for forming a sensor array package.
  4. Last, Matthew E.; Huang, Lili; Hong, Seung Jae; Kauffman, Ralph E.; Jiang, Tongbi Tom, Sensor array package.
  5. Lee, Ji Youl; Kim, Joo Young; Chung, Jong Won; Lee, Sang Yoon; Park, Jeong Il, Thin film transistor, method of manufacturing the same, and electronic device including the thin film transistor.
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