IPC분류정보
| 국가/구분 |
United States(US) Patent
등록
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| 국제특허분류(IPC7판) |
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| 출원번호 |
UP-0896973
(2007-09-07)
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| 등록번호 |
US-7683719
(2010-04-21)
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|
발명자
/ 주소 |
- Oswald, Richard
- Yamamoto, Tamotsu
- Ryu, Takashi
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| 출원인 / 주소 |
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| 대리인 / 주소 |
McDermott Will & Emery LLP
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| 인용정보 |
피인용 횟수 :
0 인용 특허 :
46 |
초록
▼
A frequency compensation circuit internal to an integrated circuit which comprises a transconductance amplifier having a first input configured to receive a reference voltage, a second input configured to receive an input voltage and an input current, a first output configured to output a first outp
A frequency compensation circuit internal to an integrated circuit which comprises a transconductance amplifier having a first input configured to receive a reference voltage, a second input configured to receive an input voltage and an input current, a first output configured to output a first output current and a second output configured to output a second output current; and a compensation circuit connected to said second output of said transconductance amplifier, wherein said first output is connected to said second input.
대표청구항
▼
We claim: 1. A frequency compensation circuit internal to an integrated circuit, comprising: a transconductance amplifier having a first input configured to receive a reference voltage, a second input configured to receive an input voltage and an input current, a first output configured to output a
We claim: 1. A frequency compensation circuit internal to an integrated circuit, comprising: a transconductance amplifier having a first input configured to receive a reference voltage, a second input configured to receive an input voltage and an input current, a first output configured to output a first output current and a second output configured to output a second output current; and a compensation network connected to said second output of said transconductance amplifier, wherein said first output is directly connected to said second input. 2. The frequency compensation circuit of claim 1, wherein said transconductance amplifier is configured to output an output current proportional to a sum of an input current with a current proportional to a difference between said reference voltage and said input voltage. 3. The frequency compensation circuit of claim 1, wherein said first output of said transconductance amplifier has a first gain Gm1 and said second output of said transconductance amplifier has a second gain Gm2, and Gm2=k×Gm1, where k is a predetermined scaling factor. 4. The frequency compensation circuit of claim 1, wherein said compensation network comprises a capacitor having one end connected to a reference potential or ground. 5. The frequency compensation circuit of claim 1, wherein said transconductance amplifier comprises: an input section configured to output a high side signal and a low side signal; and an output section configured to receive said high side signal and said low side signal from said input section and to output said first output current and said second output current. 6. The frequency compensation circuit of claim 5, wherein said input section of said transconductance amplifier comprises a differential voltage input stage and a level shift and additional gain stage, and said level shift and additional gain stage is configured to output said high side signal and said low side signal. 7. The frequency compensation circuit of claim 5, wherein said output section comprises two pairs of complementary transistors, each of said pairs of complementary transistors comprising a p-type transistor and a n-type transistor, and said high side signal is directed to control terminals of p-type transistors and said low side signal is directed to control terminals of n-type transistors. 8. The frequency compensation circuit of claim 7, wherein each of said two pairs of complementary transistors comprises a NMOS and PMOS transistor. 9. The frequency compensation circuit of claim 7, wherein each of said two pairs of complementary transistors comprises a NPN and PNP transistor. 10. A frequency compensation circuit internal to an integrated circuit, comprising: a transconductance amplifier having a first input configured to receive a reference voltage, a second input configured to receive an input voltage and an input current, a first output configured to output a first output current and directly connected to said second input, and a plurality of secondary outputs configured to output secondary output currents wherein a number of said secondary outputs is N (N=1, 2, 3, . . . ); and a plurality of compensator impedances, each of said compensator impedances connected to each of said secondary outputs, wherein a first output of said plurality of secondary outputs has a first gain Gm, and a Mth output (M=2, 3, . . . N) has a Mth gain kM×Gm. 11. The frequency compensation circuit of claim 10, wherein said transconductance simplifier is configured to output an output current proportional to a sum of said input current with a current proportional to a difference between said reference voltage and said input voltage. 12. The frequency compensation circuit of claim 10, wherein at least one of said plurality of compensator impedances comprises a capacitor connected to ground. 13. The frequency compensation circuit of claim 10, wherein said transconductance amplifier comprises: an input section configured to output a high side signal and a low side signal; and an output section configured to receive said high side signal and said low side signal from said input section and to output said first output current and said secondary output currents. 14. The frequency compensation circuit of claim 13, wherein said input section of said transconductance amplifier comprises a differential voltage input stage and a level shift and additional gain stage, and said level shift and additional gain stage is configured to output said high side signal and said low side signal. 15. The frequency compensation circuit of claim 13, wherein said output section comprises a plurality of pairs of complementary transistors, each of said pairs of complementary transistors comprising a p-type transistor and a n-type transistor, and said high side signal is directed to control terminals of p-type transistors and said low side signal is directed to control terminals of n-type transistors. 16. The internal frequency compensation circuit of claim 15, wherein each of said plurality of pairs of complementary transistors comprises a NMOS and PMOS transistor. 17. The internal frequency compensation circuit of claim 15, wherein each of said plurality of pairs of complementary transistors comprises a NPN and PNP transistor.
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