초록 ▼

An electronic lock utilizes two microprocessors remote from each other for enhanced security. The first microprocessor is disposed close to an input device such as a keypad, and the second microprocessor is disposed close to the lock mechanism and well protected from external access. The first micro

An electronic lock utilizes two microprocessors remote from each other for enhanced security. The first microprocessor is disposed close to an input device such as a keypad, and the second microprocessor is disposed close to the lock mechanism and well protected from external access. The first microprocessor transmits a communication code to the second microprocessor when it receives via the input device an access code that matches a preset access code. The second microprocessor opens the lock if the transmitted communication code matches a preset communication code. The dual-microprocessor arrangement is advantageously used in a voice controlled access control system and in a motorcycle ignition control system. The present invention further provides an electronic access control system which has a master electronic key having a preset number of access, and an electronic alarm system for a bicycle that has a remote control mounted in the helmet of the rider.

대표청구항 ▼

What is claimed is: 1. A battery-powered electronic-access control device consistently mounted about a device to be secured, the battery-powered electronic-access control device comprising: a memory containing a stored code; a keypad for entering an input code to access the battery-powered electron

What is claimed is: 1. A battery-powered electronic-access control device consistently mounted about a device to be secured, the battery-powered electronic-access control device comprising: a memory containing a stored code; a keypad for entering an input code to access the battery-powered electronic-access control device; a circuit generating a wake-up signal in response to a first key being depressed on the keypad, the input code comprising the first key and at least one subsequent keypad entry; a processor enters an awake mode for a period of time in response to receiving the wake-up signal from the circuit and the input code from the keypad, the processor or another circuit configured to generate a driver signal to activate a lock actuator in response to the input code matching the stored code; wherein the processor enters a sleep mode after the period of time, the sleep mode causing the processor to operate at a lower, power consumption rate than when the processor is in the awake mode; a low battery detection circuit for measuring a voltage associated with the battery, and wherein the low battery detection circuit is occasionally disabled, and being initiated for measurement of a voltage associated with the battery by the processor in the awake mode; wherein the processor disables operation of the battery-powered electronic-access control device for a pre-determined period of time if the processor has received a pre-determined number of invalid inputs consecutively entered through the keypad, and being in the sleep mode sometime thereafter; wherein the processor receives a program signal through the keypad and in response to the program signal, receives a code through the keypad and stores the code into the memory to form the stored code when the processor is in the awake mode, and enters the sleep mode sometime thereafter. 2. A battery-powered electronic-access control device comprising: a memory containing a stored code; a circuit comprising a processor configured to receive an input code; a communication port for receiving the input code from an electronic key to access the battery-powered electronic-access control device; the circuit generating a wake-up signal; a processor enters an awake mode for a period of time in response to receiving the wake-up signal from the circuit and the input code from the electronic key, the processor or another circuit configured to generate a driver signal to activate a lock actuator in response to the input code matching the stored code; wherein the processor enters a sleep mode after the period of time, the sleep mode causing the processor to operate at a lower power consumption rate than when the processor is in the awake mode; a low battery detection circuit for measuring a voltage associated with the battery, and wherein the low battery detection circuit is occasionally disabled, and being initiated for measurement of a voltage associated with the battery by the processor in the awake mode; wherein the processor receives a program signal and in response to the program signal, receives a code and stores the code into the memory to form the stored code when the processor is in the awake mode, and enters the sleep mode sometime thereafter. 3. A battery-powered electronic-access control device consistently mounted about a device to be secured, the battery-powered electronic-access control device comprising: a keypad having a plurality of keys configured to receive an input code and a program key for entering a program mode of operation; a memory containing a stored code; a circuit generating a wake-up signal in response to a key being depressed on the keypad; a processor enters an awake mode for a period of time in response to receiving the wake-up signal from the circuit and the input code, the processor configured to generate a driver signal to activate a lock actuator in response to the input code matching the stored code, wherein the processor enters a sleep mode after the period of time, the sleep mode causing the processor to operate at a lower power consumption rate than when the processor is in the awake mode; the processor further being operatively connected to the keypad for receiving user inputs entered through pressing the keys of the keypad, and further wherein the processor awakens from the sleep mode and enters a programming mode of operation in response to the program key being actuated, and receives an input code through the keypad and stores the input code in the memory as the stored code for the battery-powered electronic-access control device; wherein the processor disables operation of the battery-powered electronic-access control device for a pre-determined period of time if the processor has received a pre-determined number of invalid inputs consecutively entered through the keypad, and being in the sleep mode sometime thereafter; and, a low battery detection circuit for measuring a voltage associated with the battery, and wherein the low battery detection circuit is occasionally disabled, and being initiated for measurement of a voltage associated with the battery by the processor in the awake mode. 4. A battery-powered electronic-access control system for accessing an enclosure or a secure area by energizing a lock actuator, the battery-powered electronic-access control system including a first processor operatively connected to a second processor, the battery-powered electronic-access system comprising: a first processor circuit comprising the battery and the first processor, the first processor including an activated mode of operation and a deactivated mode of operation, wherein the deactivated mode of operation requiring less power supplied by the battery than the activated mode of operation, a memory comprising a serial number, a time and/or date value, and a stored access code, a circuit for sensing a wake-up signal to activate the first processor, the circuit capable of obtaining an input code and storing the input code in the memory, a communication port configured to communicate a serial number, a time and/or date value, and an input code while the first processor is in activated mode, a low battery detection circuit for measuring a voltage associated with the battery, the low battery detection circuit being initiated by the first processor in the activated mode for measurement of a voltage associated with the battery, the low battery detection circuit occasionally being disabled, a second processor circuit including the second processor and an actuator driver, the second processor circuit being separated from and electrically connected to the first processor circuit, the second processor circuit powered by the battery of the first processor circuit; wherein the first processor is activated in response to sensing the wake-up signal and transmits the input code to the second processor, the second processor having an unlock output signal generated in response to the input code matching the stored access code, and the actuator driver energizing the lock actuator in response to the unlock signal. 5. A battery-powered electronic-access control system comprising: a memory containing at least one stored code; a keypad or an electronic key reader for entering an input code to access the battery-powered electronic-access control system; a circuit generating an activation signal; a first processor configured to receive an input code, the first processor being activate for a first period of time in response to the activation signal, the first processor receiving the input code from the keypad or an electronic key from the electronic key reader; a second processor separate from the first processor and being activated for a second period of time, the second processor being configured to generate a driver output signal to activate a lock actuator in response to the input code matching one of the at least one stored code; wherein the first processor and the second processor become deactivated after the first period of time and the second period of time, respectively, the deactivated mode causing the first processor and the second processor to operate at a lower power consumption rate than when the first processor and the second processor are activated; a communication port operatively connected to the first processor or the second processor, wherein the first processor or the second processor receives a program signal through the communication port, and in response to the program signal enters a program mode of operation, receives a code through the communication port from a device remote to the battery-powered electronic-access control system, stores the code into the memory to form one of the at least one stored code when the first processor or the second processor is in the awake mode, and enters a sleep-mode sometime thereafter; and, a low-battery detection circuit that is occasionally disabled, the low-battery detection for measuring a voltage associated with the battery and being initiated by the first processor or the second processor in the activated mode. 6. A battery-powered electronic-access control device comprising: a memory containing a serial number and a stored access code; a circuit for sensing an electromagnetic signal containing an input code; a processor operatively connected to the circuit for sensing, the processor being capable of entering an awake mode and obtaining the input code via the electromagnetic signal, and the processor further being capable of entering a sleep mode after a period of time wherein the processor operates at a lower power consumption rate when in the sleep mode than in the awake mode; and, a signal to activate a lock actuator being generated by the processor when the input code matches the stored access code; an at least one communication port operatively connected to the processor, wherein the processor receives a write signal through the at least one communication port, and in response to the write signal enters a program mode of operation, receives a code through the at least one communication port from a device remote to the battery-powered electronic-access control system, stores the code into the memory to form the stored code when the processor is in the awake mode, and enters a sleep mode sometime thereafter; a low battery detection circuit for measuring a voltage associated with the battery, and wherein the low battery detection circuit is occasionally disabled, and being initiated for measurement of a voltage associated with the battery by the processor in the awake mode; and, wherein the processor is programmed to communicate the serial number through the at least one communication port with a device remote to the battery-powered electronic-access control device when the processor is in the awake mode, and enters the sleep mode sometime thereafter. 7. The electronic access control device of claim 1 wherein a serial number is stored in a memory of the device and communicated with a device external to the access control device. 8. The electronic access control device of claim 1, wherein a time or date value is stored in a memory of the device and communicated with a device external to the access control device. 9. The electronic access control device of claim 1, wherein the memory contains a value separate from the stored code for limiting access of the device. 10. The electronic access control device of claim 1 wherein the driver signal has a first state and a second state, the driver signal providing a lower non-zero power output in the second state than in the first state. 11. The access control device of claim 1 further comprising a motion detection sensor and an alarm operatively connected to the processor, wherein the motion detection sensor detects movement of the device to be secured, and following detection the alarm annunciates. 12. The electronic access control device of claim 1, wherein the stored code is disabled from being compared to the input code. 13. The electronic access control device of claim 1, further comprising a program key wherein the program key is pressed prior to storing an access code in a memory. 14. The electronic access control device of claim 13, wherein pressing the program key wakes-up the processor and the processor proceeds to enter a program mode of operation. 15. The electronic access control device of claim 13, wherein the program key is accessible when an enclosure is in the secured or non-secured position. 16. The circuit of claim 1 wherein the processor is triggered to enter the sleep-mode by a timer or an oscillator. 17. The electronic access control device of claim 1, further comprising a communication port separate from the keypad and operatively connected to the processor for receiving a program command, and in response to the program command to enter a program mode of operation, receive a code while the processor is enabled and store the code into the memory, said code sent from a device remote to the electronic access control device, and the processor enters the sleep-mode sometime thereafter. 18. The access control device of claim 1 wherein a stored code is non-reprogrammable. 19. The electronic access control device of claim 1, further comprising a communication port operatively connected to the processor, and wherein the processor is programmed to transmit an access code stored in the memory through the communication port to a device remote to the electronic access control device while the processor is enabled, and the processor enters the sleep-mode sometime thereafter. 20. The electronic access control device of claim 1, wherein the processor is further configured to wake-up to receive the input code and to be in the sleep-mode after the processor detects a lapse of a pre-determined time before the complete input code is received. 21. The electronic access control device of claim 1, further comprising a clear key on the keypad, wherein the processor is further configured to enter a sleep-mode upon detecting the clear key has been pressed. 22. The electronic access control device of claim 7 wherein a time or date value, the access code and a limit value are stored in a memory of the device and communicated with a device external to the access control device. 23. The electronic access control device of claim 1, further comprising two processors, wherein a first processor is the processor for comparing the input code with the access code and is shielded from external access and the second processor obtains the input code and communicates the input code to the first processor. 24. The electronic access control device of claim 1, further comprising a circuit for sensing an electromagnetic signal containing the input code, and a processor operatively connected to the circuit for sensing and obtaining the input code via the electromagnetic signal. 25. The electronic access control device of claim 24, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation to obtain the input code upon sensing a signal of radio frequency. 26. The electronic access control device of claim 24, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation for a first time period to sense the electromagnetic signal, and is activated for a second time period to obtain the input code, the second time period being greater than the first time period. 27. The circuit of claim 1, wherein the current drained from the battery is less than 100 micro-amps during a time when the processor is asleep and the current drained from the battery is greater than 100 micro-amps during a time when the processor is awake. 28. The electronic access control device of claim 2, further comprising a program key separate from the communication port, wherein pressing the program key the processor will proceed to enter a program mode of operation. 29. The electronic access control device of claim 28, wherein the program key is accessable when an enclosure is in the secured or non-secured position. 30. The electronic access control device of claim 2, further comprising a program key wherein the program key is pressed prior to storing an access code in a memory. 31. The electronic access control device of claim 2, further comprising a keypad wherein a circuit generates a wake-up signal in response to pressing a key on the keypad. 32. The electronic access control system of claim 2 wherein the processor receives a first program signal through a program key and in response to the first program signal, receives a first code through a keypad and stores the first code into the memory to form the at least one stored code when the processor is in the awake mode, and enters the sleep mode sometime thereafter; and, wherein the processor receives a second program signal via a communication port separate from the program key and in response to the second program signal, receives a second code and stores the second code into the memory to form the at least one stored code when the processor is in the awake mode, and enters a sleep mode sometime thereafter. 33. The electronic access control device of claim 2 wherein a serial number is stored in a memory of the device and communicated with a device external to the access control device. 34. The electronic access control device of claim 2, wherein a time or date value is stored in a memory of the device and communicated with a device external to the access control device. 35. The electronic access control device of claim 2, wherein the memory contains a value separate from the stored code for limiting access of the device. 36. The electronic access control device of claim 2 wherein the driver signal has a first state and a second state, the driver signal providing a lower non-zero power output in the second state than in the first state. 37. The circuit of claim 2 wherein the processor is triggered to enter the sleep-mode by a timer or an oscillator. 38. The electronic access control device of claim 2, further comprising a communication port separate from the keypad and operatively connected to the processor for receiving a program command, and in response to the program command to enter a program mode of operation, receive a code while the processor is enabled and store the code into the memory, said code sent from a device remote to the electronic access control device, and the processor enters the sleep-mode sometime thereafter. 39. The electronic access control device of claim 2, further comprising a communication port operatively connected to the processor, and wherein the processor is programmed to transmit an access code stored in the memory through the communication port to a device remote to the electronic access control device while the processor is enabled, and the processor enters the sleep-mode sometime thereafter. 40. The electronic access control device of claim 33 wherein a time or date value, the access code and a limit value are stored in a memory of the device and communicated with a device external to the access control device. 41. The electronic access control device of claim 2, wherein a circuit generates the wake-up signal in response to pressing a first key on a keypad used in entering an input code, the input code comprising the first key and at least one subsequent keypad entry. 42. The electronic access control device of claim 2, further comprising two processors, wherein a first processor is the processor for comparing the input code with the access code and is shielded from external access and the second processor obtains the input code and communicates the input code to the first processor. 43. The electronic access control device of claim 2, further comprising a circuit for sensing an electromagnetic signal containing the input code, and a processor operatively connected to the circuit for sensing and obtaining the input code via the electromagnetic signal. 44. The electronic access control device of claim 43, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation to obtain the input code upon sensing a signal of radio frequency. 45. The electronic access control device of claim 43, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation for a first time period to sense the electromagnetic signal, and is activated for a second time period to obtain the input code, the second time period being greater than the first time period. 46. The circuit of claim 2, wherein the current drained from the battery is less than 100 micro-amps during a time when the processor is asleep and the current drained from the battery is greater than 100 micro-amps during a time when the processor is awake. 47. The electronic access control device of claim 2, wherein the stored code is disabled from being compared to the input code. 48. The access control device of claim 2 wherein a stored code is non-reprogrammable. 49. The electronic access control device of claim 3 wherein a serial number is stored in a memory of the device and communicated with a device external to the access control device. 50. The electronic access control device of claim 3, wherein a time or date value is stored in a memory of the device and communicated with a device external to the access control device. 51. The electronic access control device of claim 3, wherein the memory contains a value separate from the stored code for limiting access of the device. 52. The electronic access control device of claim 3, wherein the driver signal has a first state and a second state, the driver signal providing a lower non-zero power output in the second state than in the first state. 53. The access control device of claim 3, further comprising a motion detection sensor and an alarm operatively connected to the processor, wherein the motion detection sensor detects movement of the device to be secured, and following detection the alarm annunciates. 54. The electronic access control device of claim 3, wherein the stored code is disabled from being compared to the input code. 55. The electronic access control device of claim 3, wherein a circuit generates the wake-up signal in response to pressing a first key on a keypad used in entering an input code, the input code comprising the first key and at least one subsequent keypad entry. 56. The electronic access control device of claim 3, wherein the program key is accessable when an enclosure is in the secured or non-secured position. 57. The circuit of claim 3, wherein the processor is triggered to enter the sleep-mode by a timer or an oscillator. 58. The electronic access control device of claim 3, further comprising a communication port separate from the keypad and operatively connected to the processor for receiving a program command, and in response to the program command to enter a program mode of operation, receive a code while the processor is enabled and store the code into the memory, said code sent from a device remote to the electronic access control device, and the processor enters the sleep-mode sometime thereafter. 59. The access control device of claim 3, wherein a stored code is non-reprogrammable. 60. The electronic access control device of claim 3, further comprising a communication port operatively connected to the processor, and wherein the processor is programmed to transmit an access code stored in the memory through the communication port to a device remote to the electronic access control device while the processor is enabled, and the processor enters the sleep-mode sometime thereafter. 61. The electronic access control device of claim 3, wherein the processor is further configured to wake-up to receive the input code and to be in the sleep-mode after the processor detects a lapse of a pre-determined time before the complete input code is received. 62. The electronic access control device of claim 3, further comprising a clear key on the keypad, wherein the processor is further configured to enter a sleep-mode upon detecting the clear key has been pressed. 63. The electronic access control device of claim 49, wherein a time or date value, the access code and a limit value are stored in a memory of the device and communicated with a device external to the access control device. 64. The electronic access control device of claim 3, further comprising two processors, wherein a first processor is the processor for comparing the input code with the access code and is shielded from external access and the second processor obtains the input code and communicates the input code to the first processor. 65. The electronic access control device of claim 3, further comprising a circuit for sensing an electromagnetic signal containing the input code, and a processor operatively connected to the circuit for sensing and obtaining the input code via the electromagnetic signal. 66. The electronic access control device of claim 65, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation to obtain the input code upon sensing a signal of radio frequency. 67. The electronic access control device of claim 65, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation for a first time period to sense the electromagnetic signal, and is activated for a second time period to obtain the input code, the second time period being greater than the first time period. 68. The circuit of claim 3, wherein the current drained from the battery is less than 100 micro-amps during a time when the processor is asleep and the current drained from the battery is greater than 100 micro-amps during a time when the processor is awake. 69. The access control system of claim 4, wherein the input code is received by the activated processor from a device external to the access control system via an electromagnetic signal, and the processor is deactivated sometime thereafter. 70. The electronic access control device of claim 4, further comprising a circuit for sensing an electromagnetic signal containing the input code, and a processor operatively connected to the circuit for sensing and obtaining the input code via the electromagnetic signal. 71. The electronic access control device of claim 70, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation to obtain the input code upon sensing a signal of radio frequency. 72. The electronic access control device of claim 70, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation for a first time period to sense the electromagnetic signal, and is activated for a second time period to obtain the input code, the second time period being greater than the first time period. 73. The electronic access control device of claim 4, wherein the memory contains a value separate from the stored code for limiting access of the device. 74. The apparatus of claim 4, wherein the input code or the serial number or the time or date value communicated by the first or second processor is encrypted. 75. The electronic access control device of claim 4 wherein the actuator driver signal has a first state and a second state, the driver signal providing a lower non-zero power output in the second state than in the first state. 76. The access control system of claim 4, wherein the serial number is communicated with a device external to the access control system. 77. The access control system of claim 4, wherein the serial number is communicated between the first processor and second processor. 78. The circuit of claim 4, wherein the current drained from the battery is less than 100 micro-amps during a time when the first processor is deactivated and the current drained from the battery is greater than 100 micro-amps during a time when the first processor is activated. 79. The access control system of claim 4, wherein the time or date value is communicated between the first processor and second processor. 80. The electronic access control device of claim 4, wherein the stored code is disabled from being compared to the input code. 81. The access control device of claim 4 wherein a stored code is non-reprogrammable. 82. The circuit of claim 5 wherein the first or second processor is triggered to enter the sleep mode by a timer or an oscillator. 83. The circuit of claim 5 wherein the first or second processor is triggered to enter the wake-up mode by a timer or an oscillator. 84. The access control system of claim 5, wherein the input code is obtained by the activated processor from a device external to the access control system via an electromagnetic signal, and the processor is deactivated sometime thereafter. 85. The electronic access control device of claim 5, further comprising a circuit for sensing an electromagnetic signal containing the input code, and a processor operatively connected to the circuit for sensing and obtaining the input code via the electromagnetic signal. 86. The electronic access control device of claim 85, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation to obtain the input code upon sensing a signal of radio frequency. 87. The electronic access control device of claim 85, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation for a first time period to sense the electromagnetic signal, and is activated for a second time period to obtain the input code, the second time period being greater than the first time period. 88. The electronic access control device of claim 5, wherein the memory contains a value separate from the stored code for limiting access of the device. 89. The apparatus of claim 5, wherein the input code or the serial number or the time or date value communicated by the first or second processor is encrypted. 90. The electronic access control device of claim 5 wherein the actuator driver signal has a first state and a second state, the driver signal providing a lower non-zero power output in the second state than in the first state. 91. The access control system of claim 5, wherein the serial number is communicated with a device external to the access control system. 92. The access control system of claim 5, wherein the serial number is communicated between the first processor and second processor. 93. The circuit of claim 5, wherein the current drained from the battery is less than 100 micro-amps during a time when the first processor is deactivated and the current drained from the battery is greater than 100 micro-amps during a time when the first processor is activated. 94. The access control system of claim 5, wherein the time or date value is communicated between the first processor and second processor. 95. The access control system of claim 5, wherein a time or date value is communicated with a device external to the access control system. 96. The electronic access control device of claim 5, further comprising a program key separate from the communication port, wherein pressing the program key the processor will proceed to enter a program mode of operation. 97. The electronic access control device of claim 5, wherein the program key is accessable when an enclosure is in the secured or non-secured position. 98. The electronic access control device of claim 5, further comprising a program key wherein the program key is pressed prior to storing an access code in a memory. 99. The electronic access control device of claim 5, further comprising a keypad wherein a circuit generates a wake-up signal in response to pressing a key on the keypad. 100. The electronic access control device of claim 5, wherein a circuit generates the wake-up signal in response to pressing a first key on the keypad used in entering an input code, the input code comprising the first key and at least one subsequent keypad entry. 101. The access control device of claim 5 wherein a stored code is non-reprogrammable. 102. The access control device of claim 5 wherein the stored code is disabled from being compared to the input code. 103. The electronic access control device of claim 5, further comprising a communication port operatively connected to the processor, and wherein the processor is programmed to transmit an access code stored in the memory through the communication port to a device remote to the electronic access control device while the processor is enabled, and the processor enters the sleep-mode sometime thereafter. 104. The electronic access control device of claim 5, wherein the processor is further configured to wake-up to receive the input code and to be in the sleep-mode after the processor detects a lapse of a pre-determined time before the complete input code is received. 105. The electronic access control device of claim 5, further comprising a clear key on the keypad, wherein the processor is further configured to enter a sleep-mode upon detecting the clear key has been pressed. 106. The electronic access control device of claim 5 wherein a time or date value, the access code and a limit value are stored in a memory of the device and communicated with a device external to the access control device. 107. The electronic access control device of claim 5, wherein pressing the program key wakes-up the processor and the processor proceeds to enter a program mode of operation; and, wherein a circuit generates the wake-up signal in response to pressing a first key on a keypad used in entering an input code, the input code comprising the first key and at least one subsequent keypad entry. 108. The electronic access control device of claim 6, wherein the memory contains a value separate from the stored code for limiting access of the device. 109. The apparatus of claim 6, wherein the input code or the serial number communicated by the processor is encrypted. 110. The electronic access control device of claim 6 wherein the actuator driver signal has a first state and a second state, the driver signal providing a lower non-zero power output in the second state than in the first state. 111. The access control system of claim 6, wherein a time or date value is communicated with a device external to the access control system. 112. The circuit of claim 6, wherein the current drained from the battery is less than 100 micro-amps during a time when the processor is asleep and the current drained from the battery is greater than 100 micro-amps during a time when the processor is awake. 113. The electronic access control device of claim 6, further comprising a program key separate from the communication port, wherein pressing the program key the processor will proceed to enter a program mode of operation. 114. The electronic access control device of claim 6, wherein the program key is accessable when an enclosure is in the secured or non-secured position. 115. The electronic access control device of claim 6, further comprising a program key wherein the program key is pressed prior to storing an access code in a memory. 116. The electronic access control device of claim 6, further comprising a keypad wherein a circuit generates a wake-up signal in response to pressing a key on the keypad. 117. The electronic access control system of claim 6, wherein the processor receives a first program signal through a program key and in response to the first program signal, receives a first code through the keypad and stores the first code into the memory to form the at least one stored code when the processor is in the awake mode, and enters the sleep mode sometime thereafter; and, wherein the processor receives a second program signal via a communication port separate from the program key and in response to the second program signal, receives a second code and stores the second code into the memory to form the at least one stored code when the processor is in the awake mode, and enters a sleep mode sometime thereafter. 118. The circuit of claim 6, wherein the processor is triggered to enter the sleep mode by a timer or an oscillator. 119. The circuit of claim 6, wherein the processor is triggered to enter the wake-up mode by a timer or an oscillator. 120. The electronic access control device of claim 6, further comprising a communication port operatively connected to the processor, and wherein the processor is programmed to transmit an access code stored in the memory through the communication port to a device remote to the electronic access control device while the processor is enabled, and the processor enters the sleep-mode sometime thereafter. 121. The electronic access control device of claim 116, wherein a circuit generates the wake-up signal in response to pressing a first key on a keypad used in entering an input code, the input code comprising the first key and at least one subsequent keypad entry. 122. The electronic access control device of claim 6, further comprising two processors, wherein a first processor is the processor for comparing the input code with the access code and is shielded from external access and the second processor obtains the input code and communicates the input code to the first processor. 123. The electronic access control device of claim 6, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation to obtain the input code upon sensing a signal of radio frequency. 124. The electronic access control device of claim 6, wherein the circuit for sensing the electromagnetic signal transitions from a deactivated mode to an activated mode of operation for a first time period to sense the electromagnetic signal, and is activated for a second time period to obtain the input code, the second time period being greater than the first time period. 125. The electronic access control device of claim 6, wherein the stored code is disabled from being compared to the input code. 126. The access control device of claim 6 wherein a stored code is non-reprogrammable.