IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0417020
(2009-04-02)
|
등록번호 |
US-7746103
(2010-07-19)
|
발명자
/ 주소 |
- Gaide, Brian C.
- Young, Steven P.
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
5 인용 특허 :
20 |
초록
▼
A multi-mode circuit for a self-timed integrated circuit is provided. The multi-mode circuit is programmable to operate in two or more modes, and is coupled to require, in each mode, receipt of a token on at least one of first, second, or third inputs before providing an output token. The multi-mode
A multi-mode circuit for a self-timed integrated circuit is provided. The multi-mode circuit is programmable to operate in two or more modes, and is coupled to require, in each mode, receipt of a token on at least one of first, second, or third inputs before providing an output token. The multi-mode circuit is further coupled to require tokens on different inputs in at least two different modes. The multi-mode circuit can be an output circuit for a logic block in an integrated circuit including an array of interconnected logic blocks, where each logic block includes a logic circuit and a multi-mode circuit. One input of each multi-mode circuit can be programmably coupled to a select output of a multi-mode circuit in an adjacent logic block. Based on the programmed mode and the tokens received, the circuit routes data between inputs and outputs of the circuit.
대표청구항
▼
What is claimed is: 1. An integrated circuit, comprising: a plurality of interconnected logic blocks, each logic block comprising: a logic circuit having first and second inputs and first and second outputs; and an output circuit programmable to operate in a plurality of modes, the output circuit h
What is claimed is: 1. An integrated circuit, comprising: a plurality of interconnected logic blocks, each logic block comprising: a logic circuit having first and second inputs and first and second outputs; and an output circuit programmable to operate in a plurality of modes, the output circuit having first and second inputs respectively coupled to the first and second outputs of the logic circuit, a third input, and at least one output, wherein the output circuit is coupled to require, in each of the modes, receipt of a token on at least one of the first, second, or third inputs before providing an output token on the at least one output; and wherein the output circuit is further coupled to require tokens on different ones of the first, second, or third inputs in at least two different ones of the modes before providing the output token on the at least one output. 2. The integrated circuit of claim 1, wherein in one of the modes: the output circuit is coupled to require receipt of a token on one of the first or second inputs, while a token on the other of the first or second inputs is consumed while its value is ignored, before providing an output token on the at least one output. 3. The integrated circuit of claim 1, wherein in one of the modes: the output circuit is coupled to require receipt of tokens on all of the first, second, and third inputs before providing an output token on the at least one output. 4. The integrated circuit of claim 1, wherein in one of the modes: the output circuit is coupled to require receipt of a token on one of the first or second inputs, and receipt of a token on the third input, before providing any output token; the output circuit is further coupled to consume a token on the other of the first or second inputs while the value of the consumed token is ignored; and the output circuit is further coupled to selectively provide or not provide an output token on the at least one output, depending on a value of the third input. 5. The integrated circuit of claim 1, wherein in one of the modes: the output circuit is coupled to require receipt of a token on one of the first or second inputs, and receipt of a token on the third input, before providing an output token on the at least one output; and the output circuit is coupled to store a token on the other of the first or second inputs for later handling by the output circuit. 6. The integrated circuit of claim 1, wherein in one of the modes: the output circuit is coupled to require, in an initial cycle, receipt of a token on one of the first or second inputs, and receipt of a token on the third input, before providing an output token on the at least one output; and the output circuit is coupled to require, in subsequent cycles, receipt of a token on the one of the first or second inputs, and receipt of a token on the third input, before providing an output token on the at least one output, and further coupled to require or not to require a token on the other of the first or second inputs depending on the value of the third input. 7. The integrated circuit of claim 1, wherein: the plurality of interconnected logic blocks comprises an array of the logic blocks; and the third input of each output circuit is programmably coupled to a select output of an output circuit in an adjacent logic block in the array. 8. The integrated circuit of claim 1, wherein the modes include at least one of the following modes: a first mode wherein one of the first and second inputs is passed to the at least one output; a second mode wherein a selected one of the first or second inputs is passed to the at least one output, the selection being controlled by a value on the third input; a third mode wherein one of the first or second inputs is passed or not passed to the at least one output, depending on the value on the third input; or a fourth mode wherein: in an initial cycle, a token on the first input is passed to the at least one output; in subsequent cycles, a previously passed token is replicated or a new token on the first input is passed to the at least one output, depending on the value on the third input. 9. The integrated circuit of claim 1, wherein: the plurality of interconnected logic blocks comprises an array of substantially similar logic blocks; and the integrated circuit further comprises an interconnect structure coupled between the logic blocks. 10. The integrated circuit of claim 9, wherein the integrated circuit comprises a programmable logic device (PLD). 11. An integrated circuit, comprising: a plurality of logic blocks; and an interconnect structure coupled between the logic blocks, wherein each of the logic blocks comprises: a logic circuit having at least one input coupled to the interconnect structure, and further having first and second outputs; and an output circuit programmable to operate in a plurality of modes, the output circuit having first and second inputs respectively coupled to the first and second outputs of the logic circuit, a third input, and at least one output coupled to the interconnect structure, wherein the output circuit is coupled to require, in each of the modes, receipt of a token on at least one of the first, second, or third inputs before providing an output token on the at least one output; and wherein the output circuit is further coupled to require tokens on different ones of the first, second, or third inputs in at least two different ones of the modes before providing the output token on the at least one output. 12. The integrated circuit of claim 11, wherein in one of the modes: the output circuit is coupled to require receipt of a token on one of the first or second inputs, while a token on the other of the first or second inputs is consumed while its value is ignored, before providing an output token on the at least one output. 13. The integrated circuit of claim 11, wherein in one of the modes: the output circuit is coupled to require receipt of tokens on all of the first, second, and third inputs before providing an output token on the at least one output. 14. The integrated circuit of claim 11, wherein in one of the modes: the output circuit is coupled to require receipt of a token on one of the first or second inputs, and receipt of a token on the third input, before providing any output token; the output circuit is further coupled to consume a token on the other of the first or second inputs while a value of the consumed token is ignored; and the output circuit is further coupled to selectively provide or not provide an output token on the at least one output, depending on a value of the third input. 15. The integrated circuit of claim 11, wherein in one of the modes: the output circuit is coupled to require receipt of a token on one of the first or second inputs, and receipt of a token on the third input, before providing an output token on the at least one output; and the output circuit is further coupled to store a token on the other of the first or second inputs for later handling by the output circuit. 16. The integrated circuit of claim 11, wherein in one of the modes: the output circuit is coupled to require, in an initial cycle, receipt of a token on one of the first or second inputs, and receipt of a token on the third input, before providing an output token on the at least one output; and the output circuit is coupled to require, in subsequent cycles, receipt of a token on the one of the first or second inputs, and receipt of a token on the third input, before providing an output token on the at least one output, and further coupled to require or not to require a token on the other of the first or second inputs depending on the value of the third input. 17. The integrated circuit of claim 11, wherein: the plurality of logic blocks comprises an array of the logic blocks; the logic blocks are substantially similar one to another; and the third input of each output circuit is programmably coupled to a select output of an output circuit in an adjacent logic block in the array. 18. The integrated circuit of claim 11, wherein the modes include at least one of the following modes: a first mode wherein one of the first and second inputs is passed to the at least one output; a second mode wherein a selected one of the first and second inputs is passed to the at least one output, the selection being controlled by a value on the third input; a third mode wherein one of the first or second inputs is passed or not passed to the at least one output, depending on the value on the third input; or a fourth mode wherein: in an initial cycle, a token on the first input is passed to the at least one output; in subsequent cycles, a previously passed token is replicated or a new token on the first input is passed to the at least one output, depending on the value on the third input. 19. A circuit, comprising: means for programming the circuit to operate in a plurality of modes; means for outputting to at least one output, in a first of the modes, an output token in response to receipt of a token on at least one of first, second, or third inputs before providing an output token on at least one output; and means for outputting to the at least one output, in at least two different ones of the modes, an output token in response to receipt of tokens on different ones of the first, second, or third inputs. 20. The circuit of claim 19, wherein the modes include at least one of the following modes: a first mode wherein one of the first and second inputs is passed to the at least one output; a second mode wherein a selected one of the first and second inputs is passed to the at least one output, the selection being controlled by a value on the third input; a third mode wherein one of the first or second inputs is passed or not passed to the at least one output, depending on the value on the third input; or a fourth mode wherein: in an initial cycle, a token on the first input is passed to the at least one output; in subsequent cycles, a previously passed token is replicated or a new token on the first input is passed to the at least one output, depending on the value on the third input.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.