IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0477715
(2006-06-30)
|
등록번호 |
US-7755587
(2010-08-02)
|
우선권정보 |
JP-2005-192479(2005-06-30); JP-2005-253383(2005-09-01); JP-2005-253384(2005-09-01); JP-2005-253385(2005-09-01) |
발명자
/ 주소 |
- Kumagai, Takashi
- Ishiyama, Hisanobu
- Maekawa, Kazuhiro
- Ito, Satoru
- Fujise, Takashi
- Karasawa, Junichi
- Kodaira, Satoru
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
1 인용 특허 :
75 |
초록
▼
An integrated circuit device includes first to Nth circuit blocks CB1 to CBN disposed along a direction D1 when a direction from a first side which is a short side of the integrated circuit device toward a third side opposite to the first side is a direction D1 and a direction from a second side whi
An integrated circuit device includes first to Nth circuit blocks CB1 to CBN disposed along a direction D1 when a direction from a first side which is a short side of the integrated circuit device toward a third side opposite to the first side is a direction D1 and a direction from a second side which is a long side of the integrated circuit device toward a fourth side opposite to the second side is a direction D2. At least one of the circuit blocks on both ends of the circuit blocks CB1 to CBN is a scan driver block for driving a scan line. Or, the scan driver block SB is disposed along the direction D1 on the side of the first to Nth circuit blocks in the direction D2.
대표청구항
▼
What is claimed is: 1. An integrated circuit device comprising: first to Nth circuit blocks (N is an integer of three or more), the first to Nth circuit blocks being lined along a first direction when a direction from a first side that is a short side of the integrated circuit device toward a third
What is claimed is: 1. An integrated circuit device comprising: first to Nth circuit blocks (N is an integer of three or more), the first to Nth circuit blocks being lined along a first direction when a direction from a first side that is a short side of the integrated circuit device toward a third side opposite to the first side is the first direction and a direction from a second side that is a long side of the integrated circuit device toward a fourth side opposite to the second side is a second direction; a first interface region provided along the fourth side at one side of the first to Nth circuit blocks in the second direction; and a second interface region provided along the second side at another side of the first to Nth circuit blocks in a fourth direction opposite to the second direction, one of the circuit blocks at both ends of the first to Nth circuit blocks being a scan driver block that drives a scan line, the circuit block(s) of the first to Nth circuit blocks excluding the scan driver block including at least one data driver block that drives a data line, the circuit block(s) of the first to Nth circuit blocks excluding the scan driver block and the at least one data driver block including at least one memory block that stores image data, one of the at least one memory block being lined adjacent to one of the at least one data driver block along the first direction, the circuit blocks excluding the scan driver block, the at least one data driver block and the at least one memory block including: a logic circuit block that sets grayscale characteristic adjustment data, a grayscale voltage generation circuit block that generates a grayscale voltage based on the set adjustment data, and a power supply circuit block that generates a power supply voltage, the one of the at least one data driver block receiving the grayscale voltage from the grayscale voltage generation circuit block and the one of the at least one data driver block driving the data line, and in the at least one memory block, a shield line being provided in an upper layer of a bitline and a grayscale voltage output line to which the grayscale voltage from the grayscale voltage generation circuit block is output being provided in an upper layer of the shield line. 2. The integrated circuit device as defined in claim 1, the power supply circuit block being disposed between the scan driver block and the one of the at least one data driver block. 3. The integrated circuit device as defined in claim 1, the at least one data driver block being disposed between the logic circuit block and the power supply circuit block, the at least one data driver block being disposed between the grayscale voltage generation circuit block and the power supply circuit block. 4. The integrated circuit device as defined in claim 1, the logic circuit block and the grayscale voltage generation circuit block being adjacently lined along the first direction. 5. The integrated circuit device as defined in claim 1, the grayscale voltage generation circuit block being disposed between the data driver block and the logic circuit block. 6. The integrated circuit device as defined in claim 1, the at least one memory block being first to Ith memory blocks (I is an integer of two or more), the at least one data driver being first to Ith data driver blocks, each of the first to Ith memory blocks being lined adjacent to a data driver block of the first to Ith data driver blocks along the first direction, the one of the at least one memory block being the first memory block, and the one of the at least one data driver block being the first data driver block. 7. The integrated circuit device as defined in claim 1, the grayscale voltage generation circuit block including a select voltage generation circuit that outputs a select voltage based on a power supply voltage, and a grayscale voltage select circuit that selects and outputs the grayscale voltage based on the adjustment data set by the logic circuit block and the select voltage. 8. The integrated circuit device as defined in claim 7, the select voltage generation circuit being disposed at a side of the grayscale voltage select circuit in the second direction or the fourth direction. 9. The integrated circuit device as defined in claim 7, the grayscale voltage select circuit being disposed between the data driver block and the logic circuit block. 10. The integrated circuit device as defined in claim 1, a grayscale voltage output line to which the grayscale voltage from the grayscale voltage generation circuit block is output being provided over the first to Nth circuit blocks along the first direction. 11. The integrated circuit device as defined in claim 1, in the at least one memory block, the bitline being provided along the first direction and the shield line being provided along the first direction to overlap the bitline. 12. An electronic instrument comprising: the integrated circuit device as defined in claim 1; and a display panel driven by the integrated circuit device. 13. The integrated circuit device as defined in claim 1, the scan driver block being a first scan driver block, the circuit block(s) of the first to Nth circuit blocks excluding the first scan driver block, the at least one data driver block and the at least one memory block including a second scan driver block that scans another scan line, another of the circuit blocks at the both ends of the first to Nth circuit blocks being the second scan driver block. 14. The integrated circuit device as defined in claim 13, the circuit blocks excluding the first scan driver block, the at least one data driver block, the at least one memory block and the second scan driver including a logic circuit block that sets grayscale characteristic adjustment data, a grayscale voltage generation circuit block that generates a grayscale voltage based on the set adjustment data, and a power supply circuit block that generates a power supply voltage, the one of the at least one data driver block receiving the grayscale voltage from the grayscale voltage generation circuit block, and the one of the at least one data driver block driving drives the data line, the power supply circuit block being disposed between the first scan driver block and the data driver block, and the logic circuit block and the grayscale voltage generation circuit block being disposed between the second scan driver block and the one of the at least one data driver block.
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