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Nasal prong protector 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B65D-085/00
출원번호 UP-0704302 (2010-02-11)
등록번호 US-7798332 (2010-10-11)
우선권정보 CA-2659912(2009-03-24)
발명자 / 주소
  • Brunet, Sarah Mary
대리인 / 주소
    Lang Michener LLP
인용정보 피인용 횟수 : 48  인용 특허 : 4

초록

The invention consists of a prong protector for use with a nasal cannula, the nasal cannula having a body portion, a pair of nasal prongs extending from the body portion, and first and second supply tubes extending from opposite ends of the body portion. The prong protector includes a housing having

대표청구항

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows: 1. A prong protector for use with a nasal cannula, the nasal cannula having a body portion, a pair of nasal prongs extending from the body portion, and first and second supply tubes exten

이 특허에 인용된 특허 (4)

  1. Roshdy Constance E. (New Egypt NJ), Foldable package for endoscopic components and the like.
  2. Jaeschke Harold R. (Milwaukee WI) Linder Alan (Wauwatosa WI) Boyle Daniel J. (Hartland WI), Folder to hold coil of plastic tubing with clamp and fittings.
  3. Estes Ronald L. (25 Forest Pines Dr. Statesboro GA 30458), Organizer devices for orthopedic equipment normally found in cast removal situations.
  4. Durbin William H. (P.O. Box 416 Redwood City CA 94064), Universal portable pack.

이 특허를 인용한 특허 (48)

  1. Yeh, Chih Chieh; Chang, Chih-Sheng; Wann, Clement Hsingjen, Accumulation type FinFET, circuits and fabrication method thereof.
  2. Yeh, Chih Chieh; Chang, Chih-Sheng; Wann, Clement Hsingjen, Accumulation type FinFET, circuits and fabrication method thereof.
  3. Huang, Yu-Lien; Tsai, Chun Hsiung; Wu, Chii-Ming; Fang, Ziwei, Doped oxide for shallow trench isolation (STI).
  4. Chung, Tao-Wen; Ke, Po-Yao; Chung, Shine; Hsueh, Fu-Lung, Electrical anti-fuse and related applications.
  5. Hsueh, Fu-Lung; Chung, Tao Wen; Ke, Po-Yao; Chung, Shine, Electrical fuse and related applications.
  6. Lin, Hung-Ta; Fu, Chu-Yun; Chen, Hung-Ming; Yang, Shu-Tine; Huang, Shin-Yeh, Fin field effect transistor.
  7. Lin, Hung-Ta; Fu, Chu-Yun; Huang, Shin-Yeh; Yang, Shu-Tine; Chen, Hung-Ming, Fin field effect transistor.
  8. Lin, Hung-Ta; Fu, Chu-Yun; Huang, Shin-Yeh; Yang, Shu-Tine; Chen, Hung-Ming, Fin held effect transistor.
  9. Ko, Chih-Hsin; Wann, Clement Hsingjen, Fin structure for high mobility multiple-gate transistor.
  10. Yuan, Feng; Chen, Hung-Ming; Lee, Tsung-Lin; Chang, Chang-Yun; Wann, Clement Hsingjen, Fin structure of fin field effect transistor.
  11. Lin, Hung-Ta; Fu, Chu-Yun; Huang, Shin-Yeh; Yang, Shu-Tine; Chen, Hung-Ming, FinFET and method of fabricating the same.
  12. Hsu, Yu-Rung; Yu, Chen-Hua; Yeh, Chen-Nan, FinFETs and methods for forming the same.
  13. Lai, Li-Shyue; Kwok, Tsz-Mei; Yeh, Chih Chieh; Wann, Clement Hsingjen, Finfets and methods for forming the same.
  14. Chen, Hung-Ming; Yu, Shao-Ming; Chang, Chang-Yun, Integrated circuit including FINFETs and methods for forming the same.
  15. Chang, Chih-Hao; Xu, Jeff J.; Wang, Chien-Hsun; Yeh, Chih Chieh; Chang, Chih-Hsiang, Integrated circuit transistor structure with high germanium concentration SiGe stressor.
  16. Liaw, Jhon Jhy, Integrated circuits and methods for forming the same.
  17. Wu, Chii-Ming; Huang, Yu Lien; Tsai, Chun Hsiung, Mechanisms for forming ultra shallow junction.
  18. Wu, Chii-Ming; Huang, Yu Lien; Tsai, Chun Hsiung, Mechanisms for forming ultra shallow junction.
  19. Wu, Chii-Ming; Huang, Yu Lien; Tsai, Chun Hsiung, Mechanisms for forming ultra shallow junction.
  20. Wu, Chii-Ming; Huang, Yu-Lien; Tsai, Chun Hsiung, Mechanisms for forming ultra shallow junction.
  21. Huang, Yu-Lien; Tsai, Chun Hsiung; Wu, Chii-Ming; Fang, Ziwei, Mechanisms of doping oxide for forming shallow trench isolation.
  22. Chan, Wei Min; Liu, Jack; Chou, Shao-Yu, Memory power gating circuit for controlling internal voltage of a memory array, system and method for controlling the same.
  23. Wang, Chien-Hsun; Chang, Chih-Sheng; Lin, Yi-Tang; Shieh, Ming-Feng, Method and device for increasing fin device density for unaligned fins.
  24. Wang, Chien-Hsun; Chang, Chih-Sheng; Lin, Yi-Tang; Shieh, Ming-Feng, Method and device for increasing fin device density for unaligned fins.
  25. Wang, Chien-Hsun; Chang, Chih-Sheng; Lin, Yi-Tang; Shieh, Ming-Feng, Method and device for increasing fin device density for unaligned fins.
  26. Lee, Tsung-Lin; Chang, Chih-Hao; Ko, Chih-Hsin; Yuan, Feng; Xu, Jeff J., Method for fabricating a strained structure.
  27. Lee, Tsung-Lin; Chang, Chih-Hao; Ko, Chih-Hsin; Yuan, Feng; Xu, Jeff J., Method for fabricating a strained structure.
  28. Lee, Tsung-Lin; Chang, Chih-Hao; Ko, Chih-Hsin; Yuan, Feng; Xu, Jeff J., Method for fabricating a strained structure and structure formed.
  29. Chang, Chih-Hao; Xu, Jeff J.; Wang, Chien-Hsun; Yeh, Chih Chieh; Chang, Chih-Hsiang, Method for forming high germanium concentration SiGe stressor.
  30. Lin, Shun Wu; Lim, Peng-Soon; Yeh, Matt; Hui, Ouyang, Method of controlling gate thickness in forming FinFET devices.
  31. Yao, Liang-Gi; Chen, Chia-Cheng; Kuan, Ta-Ming; Xu, Jeff J.; Wann, Clement Hsingjen, Method of forming a semiconductor structure.
  32. Yao, Liang-Gi; Chen, Chia-Cheng; Kuan, Ta-Ming; Xu, Jeff J.; Wann, Clement Hsingjen, Method of forming semiconductor structure.
  33. Huang, Yu-Lien; Tsai, Chun Hsiung; Wu, Chii-Ming; Fang, Ziwei, Method of making a shallow trench isolation (STI) structures.
  34. Tsai, Chun Hsiung; Huang, Yu-Lien; Yu, De-Wei, Methods for doping Fin field-effect transistors and Fin field-effect transistor.
  35. Tsai, Chun Hsiung; Huang, Yu-Lien; Yu, De-Wei, Methods for doping fin field-effect transistors.
  36. Tsai, Chun Hsiung; Huang, Yu-Lien; Yu, De-Wei, Methods for doping fin field-effect transistors.
  37. Yao, Liang-Gi; Chen, Chia-Cheng; Wann, Clement Hsingjen, Methods of forming gate dielectric material.
  38. Yao, Liang-Gi; Chen, Chia-Cheng; Wann, Clement Hsingjen, Methods of forming gate dielectric material.
  39. Yu, De-Wei; Tsai, Chun Hsiung; Huang, Yu-Lien; Chan, Chien-Tai; Huang, Wen-Sheh, Methods of forming integrated circuits.
  40. Turner, Charles Andrew, Nasal cannula cover.
  41. Turner, Charles Andrew, Nasal canula cover.
  42. Huang, Yu-Lien; Lin, Chia-Pin; Wang, Sheng-Hsiung; Hsu, Fan-Yi; Tai, Chun-Liang, Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure.
  43. Besch, Kurt; Gilbert, II, Richard R., Protective storage for a nasal cannula assembly.
  44. Huang, Yu-Lien; Chung, Han-Pin; Wang, Shiang-Bau, STI structure and method of forming bottom void in same.
  45. Arcilla, Mabini; Kimm, Gardner, Storage device for a ventilation mask.
  46. Arcilla, Mabini; Kimm, Gardner, Storage device for a ventilation mask.
  47. Hirschmann, Aaron; Hacker, Robert; Fesus, Robert; Grimes, Christopher J; Talbot Griffith, Hannah M, Tamper evident closure container.
  48. Tseng, Chih-Hung; Lin, Da-Wen; Chan, Chien-Tai; Lin, Chia-Pin; Weng, Li-Wen; Chang, An-Shen; Wu, Chung-Cheng, Transistor having notched fin structure and method of making the same.
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