Semiconductor processing parts having apertures with deposited coatings and methods for forming the same
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
C23C-016/32
C23C-016/42
출원번호
UP-0856418
(2007-09-17)
등록번호
US-7807222
(2010-10-26)
발명자
/ 주소
Kuznetsov, Vladimir
출원인 / 주소
ASM International N.V.
대리인 / 주소
Knobbe, Martens, Olson & Bear, LLP
인용정보
피인용 횟수 :
5인용 특허 :
47
초록▼
Holes in semiconductor processing reactor parts are sized to facilitate deposition of protective coatings, such as by chemical vapor deposition at atmospheric pressure. In some embodiments, the holes each have a flow constriction that narrows the holes in one part and that also divides the holes int
Holes in semiconductor processing reactor parts are sized to facilitate deposition of protective coatings, such as by chemical vapor deposition at atmospheric pressure. In some embodiments, the holes each have a flow constriction that narrows the holes in one part and that also divides the holes into one or more other portions. In some embodiments, the aspect ratios of the one or more other portions are about 15:1 or less, or about 7:1 or less, and have a cylindrical or conical cross-sectional shape. The holes are coated with a protective coating, such as a silicon carbide coating, by chemical vapor deposition, including chemical vapor deposition at atmospheric pressure.
대표청구항▼
I claim: 1. A method for manufacturing a gas divider for a semiconductor processing reactor, comprising: providing a partially-formed gas divider configured to form a wall at least partially defining a process chamber of the reactor; forming holes in the gas divider, the holes extending completely
I claim: 1. A method for manufacturing a gas divider for a semiconductor processing reactor, comprising: providing a partially-formed gas divider configured to form a wall at least partially defining a process chamber of the reactor; forming holes in the gas divider, the holes extending completely through the gas divider and each hole having an opening on a first side of the gas divider, the opening having a first width, each of the holes comprising: a constriction having a passage having a constriction length and a constriction width transverse to the constriction length, the constriction width in a plane substantially parallel to a plane of the first width, wherein the constriction width is smaller than the first width, wherein a constriction ratio of the constriction length to the constriction width is about 15:1 or less; and a first portion which opens directly to the first side of the gas divider, the first portion having a first length and a first width, the first length extending between the constriction and the opening, wherein a first ratio of the first length to the first width is about 15:1 or less; and coating surfaces of the gas divider, including the surface of the holes, by chemical vapor deposition. 2. The method of claim 1, wherein coating surfaces is performed at about atmospheric pressure. 3. The method of claim 1, wherein coating surfaces comprises depositing silicon carbide. 4. The method of claim 1, wherein forming holes further comprises forming each of the holes having a second portion which opens directly to a second side of the gas divider, the second portion having a second length and a second width, the second length and the second width defining a second ratio of length to width, wherein the second ratio is about 15:1 or less. 5. The method of claim 4, wherein the constriction ratio, the first ratio and the second ratio are substantially similar. 6. The method of claim 5, wherein the constriction ratio, the first ratio and the second ratio are about 7:1 or less. 7. The method of claim 1, wherein the partially-formed gas divider is formed of graphite. 8. A method for fabricating a semiconductor processing reactor part, comprising: providing a partially-fabricated reactor part having a hole extending through the reactor part, the hole having a first opening on a first surface of the part, the hole having a restriction, the restriction having a passage defined by an inwardly extending protrusion on walls of the hole, the passage having a restriction aspect ratio, the hole having a first hole portion defined between the first opening and the restriction, the first hole portion having a first aspect ratio; determining a relationship between the first aspect ratio and a step coverage of deposited material in the first hole portion, wherein Sfirst portion is the step coverage and is equal to a ratio of tfirst out:tfirst portion, wherein tfirst out is a surface thickness of material deposited on the first surface and tfirst portion is a bottom thickness of material deposited on a bottom of the first hole portion adjacent the restriction; selecting a target value tfirst portion target for tfirst portion; selecting a value for tout such that tout≧(Sfirst portion)(tfirst portion target); and depositing the material on the first surface and on the walls of the hole, wherein a thickness of the deposited material on the first surface is the value selected for tout or more. 9. The method of claim 8, wherein depositing tout is about 500 μm or more and tfirst portion is about 70 μm or more. 10. The method of claim 8, wherein the hole further comprises: a second opening on a second surface of the part; and a second hole portion defined between the second opening and the restriction, the second hole portion having a second aspect ratio, and further comprising: determining a relationship between the second aspect ratio and a step coverage of deposited material in the second hole portion, wherein Ssecond portion is the step coverage and is a ratio of tsecond out:tsecond portion, wherein tsecond out is a surface thickness of material deposited on the second surface and tsecond portion is a bottom thickness of material deposited on a bottom of the second hole portion adjacent the restriction; selecting a target value tsecond portion target for tsecond portion; and selecting a value for tsecond out such that tsecond out≧(Ssecond portion)(tsecond portion target). 11. The method of claim 8, wherein the reactor part is provided with a planar surface at least as wide as a major surface of a substrate accommodated in the reaction chamber. 12. The method of claim 11, wherein the reactor part forms a reactor block configured to interface with an other reactor block positioned opposite the reactor block such that the reactor block extends across the major surface of a substrate and the other reactor block extends across an opposite major surface of the substrate upon assembly of the semiconductor reactor and retention of the substrate.
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