IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
UP-0474605
(2009-05-29)
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등록번호 |
US-7819697
(2010-11-15)
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발명자
/ 주소 |
- Glover, Douglas W.
- Knaub, John E.
- Minnick, Timothy R.
- Morgan, Chad W.
- Sipe, Lynn R.
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출원인 / 주소 |
- Tyco Electronics Corporation
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인용정보 |
피인용 횟수 :
13 인용 특허 :
15 |
초록
▼
High-speed backplane connectors systems for mounting a substrate that are capable of operating at speeds of up to at least 25 Gbps, while in some implementations also providing pin densities of at least 50 pairs of electrical connectors per inch are disclosed. Implementations of the high-speed conne
High-speed backplane connectors systems for mounting a substrate that are capable of operating at speeds of up to at least 25 Gbps, while in some implementations also providing pin densities of at least 50 pairs of electrical connectors per inch are disclosed. Implementations of the high-speed connector systems may provide ground shields and/or other ground structures that substantially encapsulate electrical connector pairs, which may be differential electrical connector pairs, in a three-dimensional manner throughout a backplane footprint, a backplane connector, and a daughtercard footprint. These encapsulating ground shields and/or ground structures prevent undesirable propagation of non-traverse, longitudinal, and higher-order modes when the high-speed backplane connector systems operates at frequencies up to at least 30 GHz.
대표청구항
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What is claimed is: 1. An electrical connector system for mounting a substrate, the system comprising: a plurality of wafer assemblies defining a mating end and a mounting end, each of the wafer assemblies comprising: a first housing defining a plurality of first electrical contact channels; a firs
What is claimed is: 1. An electrical connector system for mounting a substrate, the system comprising: a plurality of wafer assemblies defining a mating end and a mounting end, each of the wafer assemblies comprising: a first housing defining a plurality of first electrical contact channels; a first array of electrical contacts positioned substantially within the plurality of first electrical contact channels, each electrical contact of the first array of electrical contacts defining an electrical mating connector extending past an edge of the first housing at the mating end of the wafer assembly; a second housing configured to mate with the first housing, the second housing defining a plurality of second electrical contact channels; a second array of electrical contacts positioned substantially within the plurality of second electrical contact channels, each electrical contact of the second array of electrical contacts defining an electrical mating connector extending past an edge of the second housing at the mating end of the wafer assembly; and a ground frame positioned at a side of the second housing, the ground frame defining a plurality of ground mating tabs extending past the edge of the second housing at the mating end of the wafer assembly; and a wafer housing adapted to position the plurality of wafer assemblies adjacent to one another in the electrical connector system. 2. The electrical connector system of claim 1, wherein the ground frame is embedded in the side of the second housing. 3. The electrical connector system of claim 1, wherein each electrical mating connector of the first and second arrays of electrical contacts is closed-band shaped. 4. The electrical connector system of claim 1, wherein each electrical mating connector of the first and second arrays of electrical contacts is tri-beam shaped. 5. The electrical connector system of claim 1, wherein each electrical mating connector of the first and second arrays of electrical contacts is dual-beam shaped. 6. The electrical connector system of claim 1, wherein in each wafer assembly, at least a portion of the electrical contacts of the first array of electrical contacts is partially surrounded by a first insulating overmold and at least a portion of the electrical contacts of the second array of electrical contacts is partially surrounded by a second insulating overmold. 7. The electrical connector system of claim 6, wherein in each wafer assembly, the first insulating overmold is substantially positioned in the plurality of first electrical contact channels; wherein in each electrical contact channel of the plurality of first electrical contact channels, the first insulating overmold defines a recess that forms an air gap between the recess and a wall of the electrical contact channel; and wherein the first array of electrical contacts is positioned in the air gaps formed by the first insulating overmold and the plurality of first electrical contact channels. 8. The electrical connector system of claim 7, wherein in each wafer assembly, the second insulating overmold is substantially positioned in the plurality of second electrical contact channels; wherein in each electrical contact channel of the plurality of second electrical contact channels, the second insulating overmold defines a recess that forms an air gap between the recess and a wall of the electrical contact channel; and wherein the second array of electrical contact is positioned in the air gaps formed by the second insulting overmold and the plurality of second electrical contact channels. 9. The electrical connector system of claim 1, wherein for each wafer assembly, each electrical contact of the first array of electrical contacts is positioned in the wafer assembly adjacent to an electrical contact of the second array of electrical contacts to form a plurality of electrical contact pairs. 10. The electrical connector system of claim 9, wherein each electrical contact of the second array of electrical contacts mirrors an adjacent electrical contact of the first array of electrical contacts. 11. The electrical connector system of claim 9, wherein a distance between an electrical contact of the first array of electrical contacts and an adjacent electrical contact of the second array of electrical contacts is substantially the same throughout a wafer assembly of the plurality of wafer assemblies. 12. The electrical connector system of claim 9, wherein each electrical contact pair is a differential pair. 13. The electrical connector system of claim 9, wherein a ground mating tab of the plurality of ground mating tabs is positioned between two adjacent electrical contact pairs at the mating end of the wafer assembly. 14. The electrical connector system of claim 13, wherein at least one ground mating tab of the plurality of ground mating tabs spans an electrical contact pair of the plurality of electrical contact pairs. 15. The electrical connector system of claim 13, wherein at least one ground mating tab of the plurality of ground mating tabs electrically contacts the first housing and electrically contacts the second housing. 16. The electrical connector system of claim 1, wherein the first and second housings comprise conductive plastic. 17. The electrical connector system of claim 1, wherein the wafer assemblies of the electrical connector system are sized and positioned such that the electrical connector system is capable of providing a substantially uniform impedance profile to electrical signals carried on the electrical contacts of the first and second arrays of electrical contacts at speeds of up to at least 25 Gbps, and wherein the density of electrical contacts at a mating end of the plurality of wafer assemblies is greater than 100 electrical contacts per inch. 18. The electrical connector system of claim 1, further comprising: a header module adapted to mate with the wafer housing and plurality of wafer assemblies, the header module comprising: a plurality of C-shaped ground shields positioned on a mating face of the header module; and a plurality of signal pin pairs positioned on the mating face of the header module; wherein each C-shaped ground shield of the plurality of C-shaped ground shields is positioned to substantially surround three sides of a signal pin pair of the plurality of signal pin pairs, wherein when the header module mates with the wafer housing and plurality of wafer assemblies, the plurality of signal pin pairs engages the electrical contacts of the first and second arrays of electrical contacts of the plurality of wafer assemblies. 19. The electrical connector system of claim 18, wherein the header module further comprises: a plurality of ground tabs positioned on the mating face of the header module; wherein at least one signal pin pair of the plurality of signal pin pairs is substantially surrounded by a C-shaped ground shield of the plurality of C-shaped ground shields and a ground tab of the plurality of ground tabs. 20. The electrical connector system of claim 19, wherein when the header module mates with the wafer housing and the plurality of wafer assemblies, the plurality of C-shaped ground shields and the plurality of ground tabs of the header module engage the plurality of ground mating tabs of the plurality of wafer assemblies. 21. The electrical connector system of claim 20, wherein when the header module mates with the wafer housing and the plurality of wafer assemblies, each ground mating tab of the plurality of ground mating tabs of the plurality of wafer assemblies, each C-shaped ground shield of the plurality of C-shaped ground shields of the header module, and each ground tab of the plurality of ground tabs of the header module spans an electrical contact of the first array of electrical contacts and an electrical contact of the second array of electrical contacts. 22. The electrical connector system of claim 21, wherein when the header module mates with the wafer housing and the plurality of wafer assemblies, each set of engaged signal pin pair and electrical contacts is electrically isolated from other sets of engaged signal pin pairs and electrical contacts by a ground mating tab of the plurality of ground mating tabs of the wafer assemblies, a C-shaped ground shield of the plurality of C-shaped ground shields of the header module, and one of a ground tab of the plurality of ground tabs of the header module or a side of another C-shaped ground shield of the plurality of C-shaped ground shields of the header module. 23. The electrical connector system of claim 18, wherein for each signal pin pair of the plurality of signal pin pairs, a first signal pin of the signal pin pairs mirrors a second signal pin of the signal pin pair. 24. The electrical connector system of claim 18, wherein the header module defines a guidance post and the wafer housing defines a complementary guidance cavity. 25. The electrical connector system of claim 18, wherein the header module defines a mating key and the wafer housing defines a complementary keyhole. 26. The electrical connector system of claim 18, wherein the signal pins of the plurality of signal pin pairs are vertical rounded pins. 27. The electrical connector system of claim 18, wherein the signal pins of the plurality of signal pin pairs are vertical U-shaped pins. 28. The electrical connector system of claim 18, wherein the plurality of C-shaped ground shields is positioned on the mating face of the header module such that each C-shaped ground shield is perpendicular to a wafer assembly of the plurality of wafer assemblies when the header module mates with the wafer housing and plurality of wafer assemblies. 29. A wafer assembly comprising: a first housing defining a plurality of first electrical contact channels; a first array of electrical contacts positioned substantially within the plurality of first electrical contact channels, each electrical contact of the first array of electrical contacts defining an electrical mating connector extending past an edge of the first housing at a mating end of the wafer assembly; a first insulating overmold partially surrounding the first array of electrical contacts, the first insulating overmold positioned substantially within the plurality of first electrical contact channels; a second housing configured to mate with the first housing, the second housing defining a plurality of second electrical contact channels; a second array of electrical contacts positioned substantially within the plurality of second electrical contact channels, each electrical contact of the second array of electrical contacts defining an electrical mating connector extending past an edge of the second housing at the mating end of the wafer assembly; a second insulating overmold partially surrounding the second array of electrical contacts, the second insulating overmold positioned substantially within the plurality of second electrical contact channels; and a ground frame positioned at a side of the second housing, the ground frame defining a plurality of ground mating tabs extending past the edge of the second housing at the mating end of the wafer assembly. 30. The wafer assembly of claim 29, wherein the ground frame is embedded in the side of the second housing. 31. The wafer assembly of claim 29, wherein in each of the first electrical contact channels, the first insulating overmold defines a recess that forms an air gap between the recess and a wall of the first electrical contact channel; and wherein the first array of electrical contacts is positioned in the air gaps formed by the first insulating overmold and the plurality of first electrical contact channels. 32. The wafer assembly of claim 31, wherein in each of the second electrical contact channels, the second insulating overmold defines a recess that forms an air gap between the recess and a wall of the second electrical contact channel; and wherein the second array of electrical contacts is positioned in the air gaps formed by the second insulating overmold and the plurality of second electrical contact channels. 33. The wafer assembly of claim 29, wherein each electrical contact of the first array of electrical contacts is positioned in the wafer assembly adjacent to an electrical contact of the second array of electrical contacts to form electrical contact pairs. 34. The wafer assembly of claim 33, wherein the electrical contact pairs are differential pairs. 35. The wafer assembly of claim 29, wherein the first and second housings comprise conductive plastic. 36. A wafer assembly comprising: a first housing defining a plurality of first electrical contact channels, a first plurality of mating ridges, and a first plurality of mating recesses, wherein at least one mating ridge of the first plurality of mating ridges and at least one mating recess of the first plurality of mating recesses are positioned between two adjacent electrical contact channels of the plurality of first electrical contact channels; a first array of electrical contacts positioned substantially within the plurality of first electrical contact channels; a second housing configured to mate with the first housing, the second housing defining a plurality of second electrical contact channels, a second plurality of mating ridges, and a second plurality of mating recesses, wherein at least one mating ridge of the second plurality of mating ridges and at least one mating recess of the second plurality of mating recesses are positioned between two adjacent electrical contact channels of the plurality of second electrical contact channels; a second array of electrical contacts positioned substantially within the plurality of second electrical contact channels; wherein when the second housing mates with the first housing, the first plurality of mating ridges engage and mate with the second plurality of mating recesses and the second plurality of mating ridges engage and mate with the first plurality of mating recesses. 37. An electrical connector system for mounting a substrate, the system comprising: a plurality of wafer assemblies positioned adjacent to one another in the electrical connector system, each wafer assembly comprising: a first housing defining a plurality of first electrical contact channels; a first array of electrical contacts positioned substantially within the plurality of first electrical contact channels; a second housing configured to mate with the first housing, the second housing defining a plurality of second electrical contact channels; a second array of electrical contacts positioned substantially within the plurality of second electrical contact channels; wherein when the first housing mates with the second housing, the first and second housings define a plurality of air gaps, at least one of the air gaps of the plurality of air gaps electrically isolating an electrical contact of the first array of electrical contacts and an electrical contact of the second array of electrical contacts; wherein the plurality of wafer assemblies are sized and positioned in the electrical connector system to provide a substantially uniform impedance profile to electrical signals carried on the electrical contacts of the first and second arrays of electrical contacts of the plurality of wafer assemblies at speeds of up to at least 25 Gbps, and wherein a density of electrical contacts at a mating end of the plurality of wafer assemblies is greater than 100 contacts per square inch. 38. An electrical connector system for mounting a substrate, the system comprising: a plurality of wafer assemblies, each wafer assembly comprising: a first housing defining a plurality of first electrical contact channels; a first array of electrical contacts positioned substantially within the plurality of first electrical contact channels; a second housing configured to mate with the first housing, the second housing defining a plurality of second electrical contact channels; a second array of electrical contacts positioned substantially within the plurality of second electrical contact channels; a wafer housing that positioned the plurality of wafer assemblies such that the wafer assemblies are aligned and positioned adjacent to one another in the electrical connector system; wherein the wafer housing defines an air gap between a mating face of the wafer housing and the first and second housings such that the air gap surrounds at least a mating end of first and second arrays of electrical contacts.
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