초록 ▼

A video and graphics system processes video data including both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The video and graphics system includes a video decoder, which is capable of concurrently decoding multiple SLICEs of MPEG-2 video

A video and graphics system processes video data including both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The video and graphics system includes a video decoder, which is capable of concurrently decoding multiple SLICEs of MPEG-2 video data. The video decoder includes multiple row decoding engines for decoding the MPEG-2 video data. Each row decoding engine concurrently decodes two or more rows of the MPEG-2 video data. The row decoding engines have a pipelined architecture for concurrently decoding multiple rows of MPEG-2 video data. The video decoder may be integrated on an integrated circuit chip with other video and graphics system components such as transport processors for receiving one or more compressed data streams and for extracting video data, and a video compositor for blending processed video data with graphics.

대표청구항 ▼

The invention claimed is: 1. A method of decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said method comprising: decoding the header of at least one macrblock using a first processing element; and decoding the block layer data of s

The invention claimed is: 1. A method of decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said method comprising: decoding the header of at least one macrblock using a first processing element; and decoding the block layer data of said at least one macroblock using a second processing element; and wherein the at least one macroblock comprises a first row of macroblocks of a frame. 2. The method of claim 1, wherein the block layer data of said at least one macroblock is decoded by the second processing element after the first processing element decodes the header of the at least one macroblock. 3. The method of claim 2, wherein the block layer data of said at least one macroblock is decoded by the second processing element immediately after the first processing element decodes the header of the at least one macroblock. 4. The method of claim 1, wherein the at least one block comprises block layer data from the first row of macroblocks. 5. The method of claim 4, wherein the second processing element decodes the block layer data of said block layer data from the first row of macroblocks after the first processing element decodes the header of the first row of macroblocks. 6. The method of claim 5, wherein the second mprocessing element decodes the block layer of data of said block layer data from the first row of macroblocks immediately after the first processing element decodes the header of the first row of macroblocks. 7. The method of claim 1, wherein the second processing element decodes a second row of block data of a second row of macroblocks while the first processing element decodes the headers of the first row of macroblocks. 8. The method of claim 4, wherein the first processing element decodes a third row of macroblock header data while the second processing element decodes the block layer data from the first row of macroblocks. 9. A method of decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said method comprising: decoding the header of at least one macrblock using a first processing element; and decoding the block layer data of said at least one macroblock using a second processing element; wherein the at least one macroblock comprises a first row of macroblocks of a frame; wherein the at least one block comprises block layer data from the first row of macroblocks; and wherein the first processing element decodes a third row of macroblock header data while the second processing element decodes the block layer data from the first row of macroblocks. 10. The method of claim 9, wherein the block layer data of said at least one macroblock is decoded by the second processing element after the first processing element decodes the header of the at least one macroblock. 11. The method of claim 10, wherein the block layer data of said at least one macroblock is decoded by the second processing element immediately after the first processing element decodes the header of the at least one macroblock. 12. The method of claim 9, wherein the second processing element decodes the block layer data of said block layer data from the first row of macroblocks after the first processing element decodes the header of the first row of macroblocks. 13. The method of claim 12, wherein the second mprocessing element decodes the block layer of data of said block layer data from the first row of macroblocks immediately after the first processing element decodes the header of the first row of macroblocks. 14. The method of claim 9, wherein the second processing element decodes a second row of block data of a second row of macroblocks while the first processing element decodes the headers of the first row of macroblocks. 15. The method of claim 9, wherein decoding block layer data for at least another macroblock using the second processing element while decoding the header at the at least one macroblock with the first processing element. 16. A circuit for decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said circuit comprising: a first processing element for decoding the header of at least one macrblock; and a second processing element for decoding the block layer data of said at least one macroblock using; and wherein the at least one macroblock comprises a first row of macroblocks of a frame. 17. The circuit of claim 16, wherein the block layer data of said at least one macroblock is decoded by the second processing element after the first processing element decodes the header of the at least one macroblock. 18. The circuit of claim 17, wherein the block layer data of said at least one macroblock is decoded by the second processing element immediately after the first processing element decodes the header of the at least one macroblock. 19. The circuit of claim 16, wherein the at least one block comprises block layer data from the first row of macroblocks. 20. The circuit of claim 19, wherein the second processing element decodes the block layer data of said block layer data from the first row of macroblocks after the first processing element decodes the header of the first row of macroblocks. 21. The circuit of claim 20, wherein the second processing element decodes the block layer of data of said block layer data from the first row of macroblocks immediately after the first processing element decodes the header of the first row of macroblocks. 22. The circuit of claim 20, wherein the second processing element decodes a second row of block data of a second row of macroblocks while the first processing element decodes the headers of the first row of macroblocks. 23. The circuit of claim 19, wherein the first processing element decodes a third row of macroblock header data while the second processing element decodes the block layer data from the first row of macroblocks. 24. A circuit of decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said circuit comprising: a first processing element for decoding the header of at least one macrblock; and a second processing element for decoding the block layer data of said at least one macroblock using a second processing element; wherein the at least one macroblock comprises a first row of macroblocks of a frame; and wherein the second processing element decodes a second row of block data of a second row of macroblocks while the first processing element decodes the headers of the first row of macroblocks. 25. The circuit of claim 24, wherein the block layer data of said at least one macroblock is decoded by the second processing element after the first processing element decodes the header of the at least one macroblock. 26. The circuit of claim 25, wherein the block layer data of said at least one macroblock is decoded by the second processing element immediately after the first processing element decodes the header of the at least one macroblock. 27. The circuit of claim 24, wherein the at least one block comprises block layer data from the first row of macroblocks. 28. The circuit of claim 27, wherein the second processing element decodes the block layer data of said block layer data from the first row of macroblocks after the first processing element decodes the header of the first row of macroblocks. 29. The circuit of claim 28, wherein the second processing element decodes the block layer of data of said block layer data from the first row of macroblocks immediately after the first processing element decodes the header of the first row of macroblocks. 30. The circuit of claim 27, wherein the first processing element decodes a third row of macroblock header data while the second processing element decodes the block layer data from the first row of macroblocks. 31. A circuit for decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said circuit comprising: a first processing element for decoding the header of at least one macrblock; and a second processing element for decoding the block layer data of said at least one macroblock using a second processing element; wherein the at least one macroblock comprises a first row of macroblocks of a frame; wherein the at least one block comprises block layer data from the first row of macroblocks; and wherein the first processing element decodes a third row of macroblock header data while the second processing element decodes the block layer data from the first row of macroblocks. 32. The circuit of claim 31, wherein the block layer data of said at least one macroblock is decoded by the second processing element after the first processing element decodes the header of the at least one macroblock. 33. The circuit of claim 32, wherein the block layer data of said at least one macroblock is decoded by the second processing element immediately after the first processing element decodes the header of the at least one macroblock. 34. The circuit of claim 31, wherein the second processing element decodes the block layer data of said block layer data from the first row of macroblocks after the first processing element decodes the header of the first row of macroblocks. 35. The circuit of claim 34, wherein the second mprocessing element decodes the block layer of data of said block layer data from the first row of macroblocks immediately after the first processing element decodes the header of the first row of macroblocks. 36. The circuit of claim 31, wherein the second processing element decodes a second row of block data of a second row of macroblocks while the first processing element decodes the headers of the first row of macroblocks. 37. The circuit of claim 31, wherein decoding block layer data for at least another macroblock using the second processing element while decoding the header at the at least one macroblock with the first processing element. 38. A method of decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said circuit comprising: decoding the header of at least one macrblock with a first processing element; and decoding the block layer data of said at least one macroblock using a second processing element; wherein the at least one macroblock comprises a first row of macroblocks of a frame; and wherein the second processing element decodes a second row of block data of a second row of macroblocks while the first processing element decodes the headers of the first row of macroblocks. 39. The method of claim 38, wherein the block layer data of said at least one macroblock is decoded by the second processing element after the first processing element decodes the header of the at least one macroblock. 40. The method of claim 39, wherein the block layer data of said at least one macroblock is decoded by the second processing element immediately after the first processing element decodes the header of the at least one macroblock. 41. The method of claim 38, wherein the at least one block comprises block layer data from the first row of macroblocks. 42. The method of claim 41, wherein the second processing element decodes the block layer data of said block layer data from the first row of macroblocks after the first processing element decodes the header of the first row of macroblocks. 43. The method of claim 42, wherein the second processing element decodes the block layer of data of said block layer data from the first row of macroblocks immediately after the first processing element decodes the header of the first row of macroblocks. 44. The method of claim 41, wherein the first processing element decodes a third row of macroblock header data while the second processing element decodes the block layer data from the first row of macroblocks. 45. The method of claim 1, further comprising: decoding block layer data for at least another macroblock using the second processing element while decoding the macroblock level header for the at least one macroblock with the first processing element, wherein said macroblock level header is hierarchically higher than the block layer data. 46. The circuit of claim 16, wherein decoding block layer data for at least another macroblock using the second processing element while decoding the macroblock level header for the at least one macroblock with the first processing element, wherein said macroblock level header is hierarchically higher than the block layer data. 47. A method of decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said method comprising: decoding the header of at least one macrblock using a first processing element; decoding the block layer data of said at least one macroblock using a second processing element; and decoding block layer data for at least another macroblock using the second processing element while decoding the macroblock level header for the at least one macroblock with the first processing element, wherein said macroblock level header is hierarchically higher than the block layer data. 48. The method of claim 47, wherein the block layer data of said at least one macroblock is decoded by the second processing element after the first processing element decodes the header of the at least one macroblock. 49. The method of claim 48, wherein the block layer data of said at least one macroblock is decoded by the second processing element immediately after the first processing element decodes the header of the at least one macroblock. 50. The method of claim 47, wherein the at least one block comprises block layer data from the first row of macroblocks. 51. The method of claim 50, wherein the second processing element decodes the block layer data of said block layer data from the first row of macroblocks after the first processing element decodes the header of the first row of macroblocks. 52. The method of claim 51, wherein the second mprocessing element decodes the block layer of data of said block layer data from the first row of macroblocks immediately after the first processing element decodes the header of the first row of macroblocks. 53. The method of claim 47, wherein the second processing element decodes a second row of block data of a second row of macroblocks while the first processing element decodes the headers of the first row of macroblocks. 54. The method of claim 50, wherein the first processing element decodes a third row of macroblock header data while the second processing element decodes the block layer data from the first row of macroblocks. 55. A circuit for decoding MPEG data comprising a plurality of macroblocks, each macroblock comprising a header and block layer data, said circuit comprising: a first processing element for decoding the header of at least one macrblock; and a second processing element for decoding the block layer data of said at least one macroblock using; and wherein decoding block layer data for at least another macroblock using the second processing element while decoding the macroblock level header for the at least one macroblock with the first processing element, wherein said macroblock level header is hierarchically higher than the block layer data. 56. The circuit of claim 55, wherein the block layer data of said at least one macroblock is decoded by the second processing element after the first processing element decodes the header of the at least one macroblock. 57. The circuit of claim 56, wherein the block layer data of said at least one macroblock is decoded by the second processing element immediately after the first processing element decodes the header of the at least one macroblock. 58. The circuit of claim 55, wherein the at least one block comprises block layer data from the first row of macroblocks. 59. The circuit of claim 58, wherein the second processing element decodes the block layer data of said block layer data from the first row of macroblocks after the first processing element decodes the header of the first row of macroblocks. 60. The circuit of claim 59, wherein the second processing element decodes the block layer of data of said block layer data from the first row of macroblocks immediately after the first processing element decodes the header of the first row of macroblocks. 61. The circuit of claim 59, wherein the second processing element decodes a second row of block data of a second row of macroblocks while the first processing element decodes the headers of the first row of macroblocks. 62. The circuit of claim 58, wherein the first processing element decodes a third row of macroblock header data while the second processing element decodes the block layer data from the first row of macroblocks.