초록 ▼

A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabli

A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabling the integration of very small integrated circuits within a larger circuit environment at a minimum cost in electrical circuit performance.

대표청구항 ▼

What is claimed is: 1. An integrated circuit chip comprising:a silicon substrate;a transistor in and on said silicon substrate;a first dielectric layer over said silicon substrate;a first metallization structure over said first dielectric layer, wherein said first metallization structure comprises a

What is claimed is: 1. An integrated circuit chip comprising:a silicon substrate;a transistor in and on said silicon substrate;a first dielectric layer over said silicon substrate;a first metallization structure over said first dielectric layer, wherein said first metallization structure comprises a first metal layer and a second metal layer over said first metal layer;a second dielectric layer between said first and second metal layers;a passivation layer over said first metallization structure and over said first and second dielectric layers; anda second metallization structure over said passivation layer, wherein said second metallization structure comprises a first metal piece and a second metal piece at a same horizontal level, wherein said first metal piece is separate from and enclosed by said second metal piece, wherein a length of said first metal piece is greater than a width of said first metal piece.