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Tamper protection of software agents operating in a vitual technology environment methods and apparatuses 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/10
출원번호 US-0529828 (2006-09-29)
등록번호 US7882318 (2011-01-18)
발명자 / 주소
  • Savagaonkar, Uday
  • Sahita, Ravi
  • Durham, David
  • Khosravi, Hormuzd
출원인 / 주소
  • Intel Corporation
대리인 / 주소
    Schwabe, Williamson & Wyatt, P.C.
인용정보 피인용 횟수 : 15  인용 특허 : 59

초록

Methods, apparatuses, articles, and systems for comparing a first security domain of a first memory page of a physical device to a second security domain of a second memory page of the physical device, the security domains being stored in one or more registers of a processor of the physical device,

대표청구항

What is claimed is: 1. A method comprising:assigning by a virtual machine manager disposed in a memory of a computing device and operated by a processor of the computing device, a first security domain to a first memory page of the memory of the computing device, and a second security domain to a se

이 특허에 인용된 특허 (59)

  1. Sahita, Ravi; Schluessler, Travis; Hahn, Scott, Agent presence monitor configured to execute in a secure environment.
  2. Hellerstein,Joseph L.; Ma,Sheng, Apparata, articles and methods for discovering partially periodic event patterns.
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  4. Pagan, William Gabriel, Apparatus method and system for improved feedback of pointing device event processing.
  5. Bugnion, Edouard, Binary translator with precise exception synchronization mechanism.
  6. Cowan, Joe Perry, Coherent memory mapping tables for host I/O bridge.
  7. Pagan,William Gabriel, Communicating to system management in a data processing system.
  8. Gau, Donald G., Concurrent multi-processor memory testing beyond 32-bit addresses.
  9. de Dinechin,Christophe; Chevrot,Jean Marc, Context-corrupting context switching.
  10. Durham, David M.; Zimmer, Vincent J.; Smith, Carey W.; Yavatkar, Raj; Schluessler, Travis T.; Larson, Dylan C.; Rozas, Carlos V., Cooperative embedded agents.
  11. Durham, David; Schluessler, Travis; Yavatkar, Raj; Zimmer, Vincent; Smith, Carey, Cross validation of data using multiple subsystems.
  12. Rhoades,David B., Customizing a computer system by using stored configuration parameters in a configuration mechanism.
  13. Iwatani,Sawao; Kamakura,Sanae, Device controller and input/output system.
  14. Koryakin, Alexey B.; Dobrovolskiy, Nikolay N.; Omelyanchuk, Andrey A.; Kuzkin, Maxim A.; Tormasov, Alexander G.; Beloussov, Serguei M.; Protassov, Stanislav S., Fast stub and frame technology for virtual machine optimization.
  15. McGuire,Cynthia; Gilliam,Jerry, Kernel event subscription and publication system and method.
  16. Willman,Bryan Mark; England,Paul; Peinado,Marcus, Memory isolation through address translation data edit control.
  17. Nozue Hiroshi (Tokyo JPX) Saito Mitsuo (Tokyo JPX) Maeda Kenichi (Tokyo JPX) Asano Shigehiro (Tokyo JPX) Okamoto Toshio (Tokyo JPX) Sungho Shin (Tokyo JPX) Segawa Hideo (Tokyo JPX), Memory management and protection system for virtual memory in computer system.
  18. Barnes, Brian C.; Strongin, Geoffrey S.; Schmidt, Rodney W., Memory management system and method for providing physical address based memory access security.
  19. Kiehtreiber,Perry; Brouwer,Michael, Method and apparatus for incremental code signing.
  20. Graunke Gary L. ; Rozas Carlos V., Method and apparatus for integrity verification, authentication, and secure linkage of software modules.
  21. Lee, Van Hoa; McLaughlin, Charles Andrew; Schwinn, Stephen Joseph, Method and apparatus for verifying hardware implementation of a processor architecture in a logically partitioned data processing system.
  22. Barroso, Luiz André; Gharachorloo, Kourosh; Nowatzyk, Andreas; Stets, Jr., Robert J.; Ravishankar, Mosur Kumaraswamy, Method and system for detecting and resolving virtual address synonyms in a two-level cache hierarchy.
  23. Hashimoto,Mikio; Fujimoto,Kensaku; Shirakawa,Kenji; Teramoto,Keiichi; Saito,Takeshi, Method and system for distributing programs using tamper resistant processor.
  24. McGuire,Cynthia A.; Hoffman,Hans Josef; Mueller,Frank, Method and system for event publication and subscription with an event channel from user level and kernel level.
  25. Gabryjelski, Henry P., Method for determining status of a computer device and detecting device behavior in response to a status request.
  26. Babaian, Boris A.; Khvatov, Roman A., Method for emulating hardware features of a foreign architecture in a host operating system environment.
  27. Horstmann Jens ; Kim Yoon, Method of accomplishing a least-recently-used replacement scheme using ripple counters.
  28. Coffman, Jerrie L.; Hefty, Mark S.; Tillier, Fabian S., Methods and system for message resource pool with asynchronous and synchronous modes of operation.
  29. Br체cklmayr,Franz Josef; Friedinger,Hans; Sedlak,Holger; May,Christian, Microprocessor circuit for data carriers and method for organizing access to data stored in a memory.
  30. Self Keith-Michael W. (Aloha OR) Peterson Craig B. (Portland OR) Sutton ; II James A. (Portland OR) Urbanski John A. (Hillsboro OR) Cox George W. (Portland OR) Rankin Linda J. (Beaverton OR) Archer D, Microprocessor point-to-point communication.
  31. Dunlap Frederick S. ; Patel Anil K., Multiple bus master computer system employing a shared address translation unit.
  32. Russell, Richard G.; Tobias, David F., Multiple protected mode execution environments using multiple register sets and meta-protected instructions.
  33. Deneau, Thomas M., Multiprocessor system implementing virtual memory using a shared memory, and a page replacement method for maintaining paged memory coherence.
  34. Conklin David Allen ; Harrison John Reed, Network surveillance system.
  35. Durham, David M.; Schluessler, Travis T.; Yavatkar, Raj; Zimmer, Vincent J.; Smith, Carey W., Notifying remote administrator of platform integrity determination.
  36. Oerting, Timothy J.; Lafornara, Philip J.; Oliver, Robert Ian; Brender, Scott A.; Marr, Michael David, Portion-level in-memory module authentication.
  37. Mahon Michael J. (San Jose CA) Baum Allen (Palo Alto CA) Bryg William R. (Saratoga CA) Miller Terrence C. (Menlo Park CA), Privilege level checking instruction for implementing a secure hierarchical computer system.
  38. Pinkas Denis,FRX, Process for verifying the preservation of the integrity of an unprotected request sent by a client to a server by verif.
  39. Cockerille, Warner; LeMay, Steven G.; Breckner, Robert, Process verification.
  40. McGrath, Kevin J., Processor including a translation unit for selectively translating virtual addresses of different sizes using a plurality of paging tables and mapping mechanisms.
  41. Dai, Chung Lang; Sankaranarayan, Mukund; Patrick, Stuart R., Protocol for communication with a user-mode device driver.
  42. Forin Alessandro, Recoverable methods and systems for processing input/output requests including virtual memory addresses.
  43. Forin, Alessandro, Recoverable methods and systems for processing input/output requests including virtual memory addresses.
  44. Scott, Steven L., Remote translation mechanism for a multi-node system.
  45. Clifton Daniel B. (Melbourne FL), Resource access security system for controlling access to resources of a data processing system.
  46. Craft, David, System and method for authenticating software using hidden intermediate keys.
  47. Edouard Bugnion ; Scott W. Devine ; Mendel Rosenblum, System and method for virtualizing computer systems.
  48. Bodrov, Dmitry, System and method of verifying the authenticity of dynamically connectable executable images.
  49. Harrison David F., System for decentralizing backing store control of virtual memory in a computer.
  50. Jones Craig S. (Austin TX) Jeffries Kenneth L. (Leander TX) Parks Terry J. (Round Rock TX), System for scheduling read ahead operations if new request is sequential of last n last read requests wherein n is diffe.
  51. Edwards, Jonathan L.; White, Edmund H., System, method and computer program product for selecting virus detection actions based on a process by which files are being accessed.
  52. Merkle, Jr.,James A.; LeVine,Richard B.; Lee,Andrew R.; Howard,Daniel G.; Goldman,Daniel M.; Pagliarulo,Jeffrey A.; Hart, III,John J.; Bouza,Jose L., Systems and methods for the prevention of unauthorized use and manipulation of digital content.
  53. Schwartz, Jonathan D.; Sie, Yu Lin; Hallin, Philip Joseph, Systems and methods for validating executable file integrity using partial image hashes.
  54. Garcia David J. ; Fowler Daniel L., Two level address translation and memory registration system and method.
  55. Herrell Russ W. (Fort Collins CO) Morrissey Thomas P. (Fort Collins CO), User scheduled direct memory access using virtual addresses.
  56. Bugnion Edouard ; Devine Scott W. ; Rosenblum Mendel, Virtual machine monitors for scalable multiprocessors.
  57. Neiger, Gilbert; Chou, Stephen; Cota-Robles, Erik; Jeyasingh, Stalinselvaraj; Kagi, Alain; Kozuch, Michael; Uhlig, Richard; Schoenberg, Sebastian, Virtual translation lookaside buffer.
  58. Dover, Lance W., Virtual-port memory and virtual-porting.
  59. Lee, Van Hoa; Patel, Kanisha; Willoughby, David R., Virtualized NVRAM access methods to provide NVRAM CHRP regions for logical partitions through hypervisor system calls.

이 특허를 인용한 특허 (15)

  1. Sahita, Ravi L.; Durham, David M.; Orrin, Steve; Rasheed, Yasser; Mulgaonkar, Prasanna G.; Schmitz, Paul S.; Khosravi, Hormuzd M., Computer system and method with anti-malware.
  2. Khosravi, Hormuzd M.; Mirashrafi, Mojtaba Mojy; Glendinning, Duncan; Prakash, Gyan, Data recovery and overwrite independent of operating system.
  3. Khosravi, Hormuzd M.; Von Bokern, Vincent E.; Long, Men, Determination by circuitry of presence of authorized and/or malicious data.
  4. Wilkerson, Daniel Shawcross; Winterrowd, Mark William, Hard object: constraining control flow and providing lightweight kernel crossings.
  5. Wilkerson, Daniel Shawcross; Kubiatowicz, John David, Hard object: hardware protection for software objects.
  6. Wilkerson, Daniel Shawcross; Winterrowd, Mark William, Hard object: lightweight hardware enforcement of encapsulation, unforgeability, and transactionality.
  7. Wilkerson, Daniel Shawcross; Winterrowd, Mark William, Hard object: lightweight hardware enforcement of encapsulation, unforgeability, and transactionality.
  8. Schunter, Matthias; Tanner, Axel; Jansen, Bernhard, Integrity protection in data processing systems.
  9. Vipat, Harshawardhan; Sahita, Ravi L., Protecting IAT/EAT hooks from rootkit attacks using new CPU assists.
  10. Kapoor, Aditya; Edwards, Jonathan L.; Schmugar, Craig; Konobeev, Vladimir; Hughes, Michael, Real-time module protection.
  11. Kapoor, Aditya; Edwards, Jonathan L.; Schmugar, Craig; Konobeev, Vladimir; Hughes, Michael, Real-time module protection.
  12. Bennett, Steven M.; Anderson, Andrew V.; Neiger, Gilbert; Uhlig, Richard A; Rodgers, Scott Dion; Sankaran, Rajesh M.; Rust, Camron; Schoenberg, Sebastian, Synchronizing a translation lookaside buffer with an extended paging table.
  13. Bennett, Steven M.; Anderson, Andrew V.; Neiger, Gilbert; Uhlig, Richard; Rodgers, Dion; Sankaran, Rajesh M; Rust, Camron; Schoenberg, Sebastian, Synchronizing a translation lookaside buffer with an extended paging table.
  14. Bennett, Steven M.; Anderson, Andrew V.; Neiger, Gilbert; Uhlig, Richard; Rodgers, Scott Dion; Sankaran, Rajesh M.; Rust, Camron; Schoenberg, Sebastian, Synchronizing a translation lookaside buffer with an extended paging table.
  15. Bennett, Steven M.; Anderson, Andrew V.; Neiger, Gilbert; Uhlig, Richard; Rodgers, Scott Dion; Sankaran, Rajesh M.; Rust, Camron; Schoenberg, Sebastian, Synchronizing a translation lookaside buffer with an extended paging table.
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