초록 ▼

A system and method for fair dynamic priority conflict resolution in a multi-processor computer system having shared resources wherein each multi-processor seeking access to said shared resource possesses a common priority level. In the occurrence of a priority tie or when a single port is active, a

A system and method for fair dynamic priority conflict resolution in a multi-processor computer system having shared resources wherein each multi-processor seeking access to said shared resource possesses a common priority level. In the occurrence of a priority tie or when a single port is active, a typical dynamic conflict resolution scheme is altered to ensure fair resolution of the conflict or tie. Upon determination that a priority conflict tie exists, one of the processor elements is selected based on a predetermined priority level. The identity of the selected processor element and the configuration of the conflict priority tie is stored. Upon a subsequent conflict priority tie having the same configuration as a previous priority conflict tie, the processor elements selected in previous ties are prevented from being selected in subsequent priority conflict ties until all of the processor elements in a particular priority tie configuration have been selected. In situations involving a single active port, established dynamic conflict resolution schemes are modified to provide fair access and reduce priority tie conflicts.

대표청구항 ▼

I claim: 1. A computer system including a plurality of processing elements requiring access to a shared resource, said computer system comprising:a priority conflict resolution circuit comparator for dynamically resolving a priority tie among a plurality of processing elements simultaneously request

I claim: 1. A computer system including a plurality of processing elements requiring access to a shared resource, said computer system comprising:a priority conflict resolution circuit comparator for dynamically resolving a priority tie among a plurality of processing elements simultaneously requesting access to said shared resource, the priority tie resulting from more than one of said plurality of processing elements to be of a common highest priority, said priority conflict resolution circuit comparator including an initial predetermined differing priority tie precedence assigned corresponding to each of said plurality of said processing elements wherein upon a selected one of said plurality of processing elements being afforded access to said shared resource based upon said initial priority tie precedence thereof being a highest priority of said plurality of processing elements and wherein an identity of the selected one of said plurality of said processors is stored so as upon a subsequent priority tie of said plurality of processing elements the selected one of said plurality of said processors is prevented from being selected again until each remaining processing element of the plurality of processing elements is selected.