초록 ▼

A flight control system includes an output device, a first processor, and a second processor. The second processor is dissimilar to the first processor. The flight control system also includes a first arbitration device coupled to the first processor and a second arbitration device coupled to the se

A flight control system includes an output device, a first processor, and a second processor. The second processor is dissimilar to the first processor. The flight control system also includes a first arbitration device coupled to the first processor and a second arbitration device coupled to the second processor. The second arbitration device is configured to coordinate transaction synchronization with the first arbitration device and the first arbitration device is configured to coordinate transaction synchronization with the second arbitration device. A comparator processor is coupled to the first arbitration device and the second arbitration device. The comparator processor is configured to compare transaction synchronized outputs of the first and second processors and the comparator processor effectuates a command to the output device if the comparison is valid.

대표청구항 ▼

What is claimed is: 1. A flight control system, comprising:an output device;a first processor;a second processor, the second processor being dissimilar to the first processor;a first arbitration device coupled to the first processor;a second arbitration device coupled to the second processor, the se

What is claimed is: 1. A flight control system, comprising:an output device;a first processor;a second processor, the second processor being dissimilar to the first processor;a first arbitration device coupled to the first processor;a second arbitration device coupled to the second processor, the second arbitration device configured to coordinate transaction synchronization with the first arbitration device and the first arbitration device configured to coordinate transaction synchronization with the second arbitration device; anda comparator processor coupled to the first arbitration device and the second arbitration device, the comparator processor being configured to:compare transaction synchronized outputs of the first and second processors; andtransmit a command to the output device according to the comparison.