이 특허에 인용된 특허 (135)

1. Schubert Rolf (Absteinach DEX) Krner Christian (Weinheim-Rippenweiher DEX), Absorber for electromagnetic and acoustic waves.

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2. Horne John G. (Lafayette CA) Dornfeld David A. (Berkeley CA) McMillen Keith A. (Berkeley CA), Acoustic emission transducer and mounting adapter for monitoring metalcutting tools.

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3. Stradley Norman H. (Stillwater MN) Woolley James A. (Coon Rapids MN), Alpha-particle-emitting ceramic composite cover.

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4. Kim Seong-bong,KRX, Apparatus for decoding video data.

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5. Patterson, Janet, Apparatus for shielding integrated circuit devices.

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6. Bloch Jeffrey J. (Los Alamos NM) Roussel-Dupre\ Diane (Los Alamos NM) Smith Barham W. (Los Alamos NM), Background-reducing X-ray multilayer mirror.

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7. Bulucea Constantin (Milpitas CA) Dermirlioglu Esin (Cupertino CA) Aronowitz Sheldon (San Jose CA), CMOS latchup suppression by localized minority carrier lifetime reduction.

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8. Bulucea Constantin (Milpitas CA) Dermirlioglu Esin (Cupertino CA) Aronowitz Sheldon (San Jose CA), CMOS latchup suppression by localized minority carrier lifetime reduction.

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9. Uno Koichi (Nagoya JPX) Murakami Shinichi (Nagoya JPX), Casing having a layer for protecting a semiconductor memory to be sealed therein against alpha particles and a method of.

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10. Comizzoli Robert B. (Belle Mead NJ), Chemically treating the overcoat of a semiconductor device.

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11. Williams ; Robert Powell ; Polinsky ; Murray Arthur, Combination glass/low temperature deposited Si.sub.w N.sub.x H.sub.y O.sub.z passivating overcoat with improved crack a.

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12. Grabbe ; Dimitry G., Connector for connecting a circuit element to the surface of a substrate.

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13. Kersch Dennis R. (Phoenix AZ) Mitchell Don E. (Phoenix AZ), Copper body power hybrid package and method of manufacture.

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14. Van Antwerp, William P.; Karre, Sheana; Prokop, Adrian; Stinson, Sara Akiko; Fong, Jason; Rosenberg, James J., Device and method for circuit protection during radiation sterilization.

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15. Ostop John A. ; Chen Li-Shu, Die attached process for SiC.

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16. McCarty William A. ; Drury Jerry ; Calderwood Bryan ; Thompson Steve, Digital vibration coupling stud.

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17. Buonanno Samuel S. (Fairport NY), EMI shielding seal with partial conductive sheath.

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18. Coupard Donald N. (8001 Overhill Dr.. Bethesda MD 20814) Chang Andrew K. (11731 Glen Mill Rd. Potomac MD 20854) Fuller John E. (4415 Brookeville Rd. Brookeville MD 20853) Mauriello Angelo (1232 Hillt, Electromagnetic radiation shielding enclosure and shielding components.

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19. Mattei Carmelo J. (Mesa AZ) Duthie Joseph S. (Algonquin IL), Electromagnetically channelized microwave integrated circuit.

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20. Sato Mitsuharu,JPX ; Yoshida Shigeyoshi,JPX ; Sato Tadakuni,JPX ; Inabe Toshihisa,JPX ; Togawa Hitoshi,JPX, Electronic device having the electromagnetic interference suppressing body.

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21. Michael Featherby ; Jennifer L. DeHaven, Electronic device packaging.

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22. Karrer,Volker; Kirchberger,Michael, Electronic unit with EMC shielding.

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23. Pasch Nicholas F. (Pacifica CA), Fabrication of substrates for multi-chip modules.

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24. Carpenter Charles L. (Irvine CA) Carter Jerry L. (Pomona CA) McElwee Terry D. (Chino CA), Ground connector for microelectronic circuit case.

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25. Gow ; 3rd John (Milton VT) Noth Richard W. (Fairfax VT), High performance versatile thermally enhanced IC chip mounting.

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26. Li Mei (Mission Viejo CA) Chang Chen-Chi P. (Newport Beach CA) Chin Maw-Rong (Huntington Beach CA), High speed silicon-on-insulator device.

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27. Oshiba Katsuyuki (Kanagawa JPX), High-frequency circuit package.

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28. Salera Edmond A. (Santa Barbara CA), Hybrid microelectronic circuit package.

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29. Marcantonio Gabriel (Nepean CAX) Nguyen Khanh (Nepean CAX), Integrated circuit package and assembly thereof for thermal and EMI management.

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30. Steven L. Pollock ; Robert L. Olivier, Integrated circuit package with EMI shield.

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31. Long Jon M. (Livermore CA), Integrated circuit package with device and wire coat assembly.

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32. Livshits Boris I. (Nepean CAX) Harpell Kevin E. (Ottawa CAX), Integrated circuit packaging.

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33. Tuttle, Mark E.; Deak, James G., Magnetic shield for integrated circuit packaging.

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34. Chang Chen-Chi P. (2515 Alta Vista Dr. Newport Beach CA 92660) Li Mei (26572 Loma Verde Mission Viejo CA 92691), Manufacturing high speed low leakage radiation hardened CMOS/SOI devices.

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35. Schelhorn Robert L. (Vincentown NJ), Metallized ceramic circuit package.

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36. Luhta, Randall P.; Brunnett, William C.; Mattson, Rodney A., Method and apparatus for alignment of anti-scatter grids for computed tomography detector arrays.

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37. Longden,Larry L.; Patterson,Janet, Method and apparatus for shielding an integrated circuit from radiation.

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38. Van Antwerp, William P.; Karre, Sheana; Prokop, Adrian; Stinson, Sara Akiko; Fong, Jason; Rosenberg, James J., Method for circuit protection during radiation sterilization.

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39. Inagaki Akihiro (Minamiashigara JPX) Yamamura Isao (Minamiashigara JPX), Method for encapsulating a semiconductor utilizing an epoxy resin and an onium salt compound.

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40. Swartz George A. (North Brunswick NJ), Method for fabricating a radiation hardened oxide having two portions.

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41. Akram Salman (Boise ID) Farnworth Warren (Nampa ID) Wood Alan (Boise ID), Method for forming a multi chip module (MCM).

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42. Featherby Michael ; Strobel David J. ; Layton Phillip J. ; Li Edward, Method for making a shielding composition.

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43. Highum Edward Allan ; Mueller Alfred Wilhelm ; Nash Thomas William ; Stadler Ewald Emil Gottlob,DEX ; Thorvilson Scott Marvin, Method for manufacturing electro-magnetic shield having multiple polymeric layers of differing fill compositions.

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44. Durand David (Portsmouth RI), Method for producing a shielded plastic enclosure to house electronic equipment.

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45. Havens Ross Downey ; Japp Robert Maynard ; Knight Jeffrey Alan ; Poliks Mark David ; Quinn ; deceased Anne M., Method for providing a protective coating and electronic package utilizing same.

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46. Sloan James W. (Austin TX) Tran Truoc T. (Austin TX) Jones ; III Frank T. (Austin TX), Method for providing alpha particle protection for an integrated circuit die.

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47. Patterson,Janet, Method for shielding integrated circuit devices.

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48. Knecht Thomas A. (Algonquin IL), Method of encapsulating a crystal oscillator.

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49. Fierkens Richardus H. J. (Keurbeek 15 Herwen NLX), Method of encapsulating microelectronic elements.

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50. Jang, Ki Youn; Kim, YoungMin; Jeon, Hyung Jun, Method of fabricating a shielded stacked integrated circuit package system.

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51. Sanders Thomas J. (Indialantic FL) White William H. (Indialantic FL), Method of fabricating improved radiation hardened self-aligned CMOS having Si doped Al field gate.

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52. Mallik Debendra (2139 S. Cottonwood Mesa AZ 85202) Bhattacharyya Bidyut K. (5063 W. Boston Way Chandler AZ 85226), Method of making a multilayer molded plastic IC package.

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53. Mori Ryuichiro (Itami JPX), Method of making resin molded semiconductor device.

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54. Kato Tsuguo (Fujisawa JPX) Thai Cao M. (Yokohama JPX), Method of manufacturing a molding using a filler or an additive concentrated on an arbitrary portion or distributed at a.

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55. Yamazaki Shunpei (Tokyo JPX) Ishida Noriya (Atsugi JPX) Sakama Mitsunori (Hiratsuka JPX) Sasaki Mari (Atsugi JPX), Method of packaging an electronic device using a common holder to carry the device in both a CVD and molding step.

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56. Sono Michio (Kawasaki JPX) Kasai Junichi (Kawasaki JPX), Method of producing semiconductor device having radiation part made of resin containing insulator powders.

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57. Mueller Charles William (Princeton NJ) Douglas Edward Curtis (Princeton Junction NJ) Wu Chung Pao (Trenton NJ), Method of radiation hardening and gettering semiconductor devices.

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58. Woods Murray Henderson (Los Gatos CA) Williams Richard (Princeton NJ), Method of radiation hardening semiconductor devices.

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59. Sakai Kunito (Hyogo JPX) Matsuda Sadamu (Hyogo JPX) Takahama Takashi (Hyogo JPX), Method of resin encapsulating a semiconductor device.

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60. Kang Wonjae L. (Sunnyvale CA), Method of using latchup current to blow a fuse in an integrated circuit.

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61. Featherby, Michael; Strobel, David J.; Layton, Phillip J.; Li, Edward, Methods and compositions for ionizing radiation shielding.

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62. Michael Featherby ; David J. Strobel ; Phillip J. Layton ; Edward Li, Methods and compositions for ionizing radiation shielding.

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63. Brandewie Jerry V. (Mission Viejo CA), Methods for improving radiation tolerance of silicon gate CMOS/silicon on sapphire devices.

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64. Eichelberger Charles W. (Schenectady NY), Methods for testing and burn-in of integrated circuit chips.

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65. Scherer Jeremy D. (South Dartmouth MA), Microcircuit package and sealing method.

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66. Kenneth A. Peterson ; Robert D. Watson, Microelectronic device package with an integral window.

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67. Mallik Debendra (Mesa AZ) Bhattacharyya Bidyut K. (Chandler AZ), Multi-layer molded plastic IC package.

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68. Beilstein ; Jr. Kenneth E. (Essex Center VT) Bertin Claude L. (South Burlington VT) Kalter Howard L. (Colchester VT) Kelley ; Jr. Gordon A. (Essex Junction VT) Miller Christopher P. (Underhill VT) Po, Multichip integrated circuit packages and systems.

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69. Herman Kwong CA, Multilayer circuit board.

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70. Camilletti Robert Charles ; Haluska Loren Andrew ; Michael Keith Winton, Multilayer coating for microelectronic devices.

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71. Landsittel ; David Thomas, Novel method and apparatus for hermetic encapsulation for integrated circuits and the like.

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72. Longden Larry L. (San Diego CA), Nuclear event detector.

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73. Cox Chadwick J. ; Lewis Carl E., Pilot-induced oscillation detection and compensation apparatus and method.

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74. Schneider Thomas W. ; Frye Gregory C. ; Martin Stephen J., Precision cleaning apparatus and method.

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75. Paquette Edward L. (Claremont CA) Riley William C. (Palos Verdes Estates CA) Taparauskas Paul A. (Solana Beach CA) Warren James W. (Woodland Hills CA), Printed circuit board with inorganic insulating matrix.

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76. Frederickson Arthur R. (Carlisle MA) Nanevicz Joseph E. (Palo Alto CA) Thayer Jeffrey S. (Simi Valley CA) Parkinson Dean B. (Redwood City CA), Process and apparatus for preventing the pulse discharge of insulators in ionizing radiation.

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77. Weiler Peter M. (Palo Alto CA) Burke Thomas S. (San Francisco CA), Process for coated bonding wires in high lead count packages.

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78. Koto Noriaki (Ichihara JPX) Yukawa Joei (Ichihara JPX) Moro Takeo (Ichihara JPX), Process for the production of a silver coated copper powder and conductive coating composition.

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79. Zechman John Harold, Process of making an integrated circuit chip composite.

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80. Valy Yves (Saint Medard En Jalles FRX) Gadbin Michel (Merignac FRX) Banchelin Jean S. L. (Le Haillan FRX) Bourcereau Jean (Bordeaux FRX), Protective box for electronic circuits hardened with respect to X-rays.

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81. Sainte Luce Banchelin Jean (Le Haillan FRX) Bourcereau Jean (Bordeaux FRX) Valy Yves (St. Medard en Jalles FRX), Protective sheath for electrical or optical conductors hardened with respect to X-rays.

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82. Taylor David B. (Greenacres WA) Zemke Steven C. (Post Falls ID), RF interconnect and shielding system.

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83. Hajdu Juan B. (Orange CT) Bastenbeck Edwin W. (Plymouth CT), RFI shielded plastic articles and process for making same.

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84. Jensen Ronald J. ; Spielberger Richard K. ; Nguyen Toan Dinh ; Jacobsen William F., Radiation enhanced chip encapsulant.

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85. Bahraman Ali (Palos Verdes Estates CA), Radiation hardened CMOS on SOI or SOS devices.

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86. Owens Alexander H. (Santa Clara CA) Lyu Mike (Saratoga CA) Toutounchi Shahin (Pleasanton CA) Yee Abraham (Santa Clara CA), Radiation hardened CMOS structure using an implanted P guard structure and method for the manufacture thereof.

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87. Young William R. (Palm Bay FL) Rivoli Anthony L. (Palm Bay FL) Wiles ; Jr. William W. (West Melbourne FL), Radiation hardened complementary transistor integrated circuits.

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88. Hillenius Steven J. (Summit NJ) Lynch William T. (Summit NJ) Manchanda Lalita (North Plainfield NJ), Radiation hardened semiconductor devices.

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89. Sanders Thomas J. (Indialantic FL) White William H. (Indialantic FL), Radiation hardened-self aligned CMOS and method of fabrication.

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90. Czajkowski David ; Marshall James C., Radiation induced single event latchup protection and recovery of integrated circuits.

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91. Dlugokecki Joseph J. (13666 Quiet Hills Dr. Poway CA 92064) Florian Joseph R. (11207 Zapata Ave. San Diego CA 92126), Radiation shielding for integrated circuit devices using reconstructed plastic packages.

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92. Cummings Brent C. (Lyons CO), Radiation shielding for spacecraft components.

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93. Strobel David J. (Poway CA) Czajkowski David R. (La Jolla CA), Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages.

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94. Strobel, David J.; Czajkowski, David R., Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages.

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95. Strobel,David J.; Czajkowski,David R., Radiation shielding of integrated circuits and multi-chip modules in ceramic and metal packages.

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96. Strobel David J. ; Czajkowski David R., Radiation shielding of plastic integrated circuits.

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97. Strobel David J. ; Czajkowski David R., Radiation shielding of plastic integrated circuits.

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98. Czajkowski David ; Eggleston Neil ; Patterson Janet, Radiation shielding of three dimensional multi-chip modules.

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99. Czjakowski David R. ; Eggleston Neil ; Patterson Janet S., Radiation shielding of three dimensional multi-chip modules.

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100. Czjakowski, David R.; Eggleston, Neil; Patterson, Janet S., Radiation shielding of three dimensional multi-chip modules.

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101. Czjakowski, David R.; Eggleston, Neil; Patterson, Janet S., Radiation shielding of three dimensional multi-chip modules.

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102. Val Christian (St. Remy-les Chevreuses FRX) Pinel Joseph (Villefranche-de-Lauragais FRX) Gibod Yves B. (St. Cyr-L\Ecole FRX), Radiation-hardened casing for an electronic component.

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103. Benedetto Joseph M., Raised pedestal radiation shield for sensitive electronics.

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104. Suzuki Osamu (Yokohama JPX), Resin molded article bearing electric circuit patterns and process for producing the same.

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105. Sono Michio (Yamato JPX), Resin-sealed radiation shield for a semiconductor device.

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106. Werner Wolfgang,DEX ; Bruchhaus Rainer,DEX ; Wersing Wolfram,DEX, Semiconductor detector for infrared radiation and method for manufacturing same.

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107. Yokoyama, Kazuo; Kageyama, Shigeki; Otsuji, Jun, Semiconductor device.

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108. Yamashita Chikara,JPX, Semiconductor device having a perforated base film sheet.

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109. Miyagaki Katsunori (Tokyo JPX) Noguchi Shozo (Tokyo JPX) Hirakawa Yukio (Tokyo JPX), Semiconductor device having improved high frequency characteristics.

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110. Nakanishi Tsutomu,JPX ; Okamoto Akira,JPX, Semiconductor device having magnetic shield layer circumscribing the device.

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111. Nelson Keith W. (St. Louis Park MN) Lenz James E. (Brooklyn Park MN) Kawai Takeshi (Kanagawa JPX), Semiconductor device housing with magnetic field protection.

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112. Ishio Toshiya,JPX ; Nakanishi Hiroyuki,JPX ; Mori Katsunobu,JPX ; Tarui Katsuyuki,JPX, Semiconductor device sealed with a sealing resin and including structure to balance sealing resin flow.

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113. Suzuki Hiroshi (Hitachi JPX) Tanaka Goro (Fujisawa JPX) Nishikawa Akio (Hitachi JPX) Mukai Junji (Hitachi JPX) Sato Mikio (Hitachi JPX) Makino Daisuke (Hitachi JPX) Wakashima Yoshiaki (Kawasaki JPX), Semiconductor memories with a 상세보기