초록 ▼

A method of forming a field effect transistor having a heavily doped p-type (110) semiconductor layer over a metal substrate starts with providing a heavily doped p-type (110) silicon layer, and forming a lightly doped p-type (110) silicon layer on the P heavily doped-type (110) silicon layer. The m

A method of forming a field effect transistor having a heavily doped p-type (110) semiconductor layer over a metal substrate starts with providing a heavily doped p-type (110) silicon layer, and forming a lightly doped p-type (110) silicon layer on the P heavily doped-type (110) silicon layer. The method also includes forming a p-channel MOSFET which has a channel region along a (110) crystalline plane in the lightly doped p-type (110) silicon layer to allow a current conduction in a direction. The p-channel MOSFET also includes a gate dielectric layer having a high dielectric constant material lining the (110) crystalline plane. The method further includes forming a top conductor layer overlying the lightly doped p-type (110) silicon layer and a bottom conductor layer underlying the heavily doped p-type (110) silicon layer. A current conduction from the top conductor layer to the bottom conductor layer is characterized by a hole mobility along a crystalline orientation and on a (110) crystalline plane.

대표청구항 ▼

What is claimed is: 1. A semiconductor device having a heavily doped p-type (110) semiconductor layer overlying a metal substrate, comprising:a first metal layer;a first p-type semiconductor layer overlying the first metal layer, the first p-type semiconductor layer being heavily doped and having a

What is claimed is: 1. A semiconductor device having a heavily doped p-type (110) semiconductor layer overlying a metal substrate, comprising:a first metal layer;a first p-type semiconductor layer overlying the first metal layer, the first p-type semiconductor layer being heavily doped and having a surface crystal orientating of (110), the first p-type semiconductor layer being characterized by a first conductivity;a second p-type semiconductor layer overlying the first p-type semiconductor layer, the second semiconductor layer having a surface crystal orientation of (110) and a second conductivity that is lower than the first conductivity;a gate dielectric layer including a high dielectric constant material, the gate dielectric layer lining a (110) crystalline plane in the second p-type semiconductor layer; anda second metal layer overlying the second p-type semiconductor layer,wherein a current conduction between the first metal layer to the second metal layer is characterized by a hole mobility along a crystalline orientation and on (110) crystalline plane.