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Configuration of programmable IC design elements 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-017/50
출원번호 US-0058569 (2008-03-28)
발명자 / 주소
  • Best, Andrew
  • Ogami, Kenneth
  • Zhaksilikov, Marat
출원인 / 주소
  • Cypress Semiconductor Corporation
인용정보 피인용 횟수 : 3  인용 특허 : 41

초록

Techniques for configuring a programmable integrated circuit (IC) include determining design elements of the programmable integrated circuit that need to be configured prior to run-time operation of the programmable IC. A user interface provides for configuring one or more parameters for each of the

대표청구항

What is claimed is: 1. A system comprising:a programmable integrated circuit including a plurality of design elements; anda host computing device to configure the design elements utilizing a design element specific graphical interface to provide specification of configuration parameters of the desig

이 특허에 인용된 특허 (41)

  1. Early,Adrian; Kutz,Harold, Analog I/O with digital signal processor array.
  2. Hyatt Gilbert P. (P.O. Box 81230 Las Vegas NV 89180), Analog memory system having an integrated circuit frequency domain processor.
  3. Lahner,Juergen; Atmakuri,Kiran; Chaturvedula,Kavitha; Balasubramanian,Balamurugan; Devineni,Krishna; Adusumalli,Srinivas; Fry,Randall P.; Pierce,Gregory A., Automated analysis of RTL code containing ASIC vendor rules.
  4. Ogami,Kenneth Y.; Pleis,Matthew A., Automatic application programming interface (API) generation for functional blocks.
  5. Bartz,Manfred; Zhaksilikov,Marat; Roe,Steve; Ogami,Kenneth Y.; Pleis,Matthew A.; Anderson,Douglas H., Automatic generation of application program interfaces, source code, interrupts, and datasheets for microcontroller programming.
  6. Meiyappan,Subramanian S.; Vajjhala,Varaprasad; Petryk,Edward M., Computer system and method to dynamically generate system on a chip description files and verification information.
  7. Bartz, Manfred; Zhaksilikov, Marat, Datasheet browsing and creation with data-driven datasheet tabs within a microcontroller design tool.
  8. LaRosa Christopher Peter (Lake Zurich IL) Carney Michael John (Mundelein IL), Digital FM demodulator.
  9. Gaston, Michael T.; Cook, David; Gandhi, Goutam; Hedrick, Gary D.; Potter, Victor L.; Lecheler, Carl J.; Matt, Timothy S., Distributed life cycle development tool for controls.
  10. Kiriaki Sami ; Krenik William R., Fir filter architecture.
  11. Charles N. Choukalos ; Alvar Antonio Dean ; Scott Alan Tetreault ; Sebastian Theodore Ventrone, High level automatic core configuration.
  12. Pesce Michael S. ; Gearhardt Kevin J. ; Kuppinger Jonathan P., Integrated circuit design using a frequency synthesizer that automatically ensures testability.
  13. Distinti, Robert J; Smith, Harry F, Integrated circuit having circuit blocks that are selectively interconnectable using programming instructions received from a remote location, such as the internet.
  14. Heile Francis B. ; Rawls Tamlyn V., Interface for compiling project variations in electronic design environments.
  15. Molson, Philippe; San, Tony, Interleaver-deinterleaver megacore.
  16. Oberlaender,Klaus J., Memory debugger for system-on-a-chip designs.
  17. Keller, Eric R.; Patterson, Cameron D., Method and apparatus for defining and modifying connections between logic cores implemented on programmable logic devices.
  18. Davidson, Scott A.; Mickelson, Steven C.; Sarkinen, Gregg T.; Sarkinen, Scott A.; Sigel, Robert W., Method and apparatus for graphically programming a programmable circuit.
  19. Zizzo, Claudio, Method and system for chip design using remotely located resources.
  20. Dangelo Carlos ; Watkins Daniel ; Mintz Doron, Method and system for creating and validating low level description of electronic design from higher level, behavior-or.
  21. Zhaksilikov,Marat, Method and system for data-driven display grids.
  22. Jacomb Hood,Anthony W., Method and system for flexibly distributing power in a phased array antenna system.
  23. Merkin,Aaron E., Method for maximizing server utilization in a resource constrained environment.
  24. Razmik Ahanessians ; Marcel A. LeBlanc, Method of generating customized megafunctions.
  25. Stellenberg Daniel S. ; Karchmer David, Methods and apparatus for automatically generating interconnect patterns in programmable logic devices.
  26. Jose Maria Insenser Farre ES; Julio Faura Enriquez ES, Microprocessor based mixed signal field programmable integrated device and prototyping methodology.
  27. Ogami,Kenneth Y.; Anderson,Douglas H., Pin-out connections/drive levels direct-set by drop down list.
  28. Anderson,Douglas H.; Seguine,Dennis, Pinout views for allowed connections in GUI.
  29. Atsatt, Sean R.; Jacobs, William S., Programmable display controller.
  30. Krokstad Asbjorn (Trondheim NOX) Svean Jarle (Trondheim NOX) Ramstad Tor A. (Saupstad NOX), Programmable hybrid hearing aid with digital signal processing.
  31. Langhammer, Martin; Hwang, Chiao Kai; Starr, Gregory, Programmable logic device including multipliers and configurations thereof to reduce resource utilization.
  32. Wenyi Feng ; William A. Oswald ; Michael L. Roy ; Eric Ting, Programming programmable logic devices using hidden switches.
  33. Doyle James T. (Chandler AZ) Beatty Tim (Mesa AZ) Liepold Carl F. (Mesa AZ), Second order Sigma-Delta based analog to digital converter having superior analog components and having a programmable c.
  34. Mueck, Michael; Laing, David Gerrard; Guery, Alain Valentin, Serial interface for an analog to digital converter and a converter including such an interface.
  35. Kodosky, Jeffrey L.; Andrade, Hugo; Odom, Brian K.; Butler, Cary P., Specifying and targeting portions of a graphical program for real-time response.
  36. Ben-Meir Sam (Sharon MA) Gibbons John F. (Natick MA) Thomas Ian (Hopkinton MA), Switching hub intelligent power management.
  37. Saylor,Michael J.; Slavin,Alison; Martin,Jean Paul; Trundle,Stephen Scott, System and method for connecting security systems to a wireless device.
  38. Schultz Thomas J. ; Campbell Alan J., System and method for remote sensing and receiving.
  39. Leibold William Steven, System and method for simulating signal flow through a logic block pattern of a real time process control system.
  40. Ciolfi, John Edward; Mani, Ramamurthy; Orofino, Donald Paul; Shakeri, Mojdeh; Ullman, Marc; Yeddanapudi, Murali, System and method for using execution contexts in block diagram modeling.
  41. Sundararajarao Mohan ; Stephen M. Trimberger, System and method of computation in a programmable logic device using virtual instructions.

이 특허를 인용한 특허 (3)

  1. Best, Andrew; Ogami, Kenneth; Zhaksilikov, Marat, Configuration of programmable IC design elements.
  2. Brusilovsky, Mikhail, Dynamic wizard execution.
  3. Ogami, Kenneth; Best, Andrew; Zhaksilikov, Marat, System and method for controlling a target device.
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