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An example controller includes first, second and third inputs, a delayed ramp generator and a drive signal generator. The first, second and third inputs are coupled to receive an input voltage sense signal, an output voltage sense signal, and an input current sense signal, respectively. The drive si

An example controller includes first, second and third inputs, a delayed ramp generator and a drive signal generator. The first, second and third inputs are coupled to receive an input voltage sense signal, an output voltage sense signal, and an input current sense signal, respectively. The drive signal generator is coupled to receive an input charge control signal generated by an input charge control signal generator and a delayed ramp signal generated by a delayed ramp generator. The input charge control signal is generated responsive to an integral of the input current sense signal multiplied by a ratio of the input voltage sense signal to the output voltage sense signal, where the drive signal generator produces a drive signal responsive to the input charge control signal and the delayed ramp signal, the drive signal to be coupled to control a switch of a power supply to regulate an output of the power supply.

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1. A power supply controller comprising: a first input to be coupled to receive an input voltage sense signal representative of a dc input voltage of the power supply;a second input to be coupled to receive an output voltage sense signal representative of a dc output voltage of the power supply;a th

1. A power supply controller comprising: a first input to be coupled to receive an input voltage sense signal representative of a dc input voltage of the power supply;a second input to be coupled to receive an output voltage sense signal representative of a dc output voltage of the power supply;a third input to be coupled to receive an input current sense signal representative of an input current of the power supply;a delayed ramp generator coupled to generate a delayed ramp signal;an input charge control signal generator coupled to generate an input charge control signal responsive to an integral of the input current sense signal and a ratio of the input voltage sense signal to the output voltage sense signal; anda drive signal generator coupled to receive the delayed ramp signal and the input charge control signal and to regulate an output of the power supply, wherein the drive signal generator produces a drive signal responsive to the input charge control signal and the delayed ramp signal, the drive signal to be coupled to control a switch of the power supply. 2. The controller of claim 1, wherein the delayed ramp signal includes a plurality of piecewise linear segments. 3. The controller of claim 2, wherein the plurality of piecewise linear segments includes a first segment of substantially zero slope followed by a second segment having a finite linear slope. 4. The controller of claim 1, further comprising an oscillator coupled to generate a clock signal, wherein the delayed ramp signal is generated responsive to the clock signal. 5. The controller of claim 1, wherein the input charge control signal generator further comprises an integrator coupled to integrate the input current sense signal to generate an input charge signal. 6. The controller of claim 5, wherein the input charge control signal generator further comprises an arithmetic operator circuit coupled to multiply, divide or scale the input voltage sense signal, the output voltage sense signal and the input charge signal to generate the input charge control signal. 7. The controller of claim 1, wherein the input charge control signal generator further comprises an arithmetic operator circuit coupled to multiply, divide or scale the input voltage sense signal, the output voltage sense signal and the input current sense signal to generate a scaled current signal that is responsive to the input current sense signal multiplied by the ratio of the input voltage sense signal to the output voltage sense signal. 8. The controller of claim 7, wherein the scaled current signal is a product of the input current sense signal multiplied by the ratio of the input voltage sense signal to the output voltage sense signal, the product further multiplied by a scaling factor. 9. The controller of claim 7, wherein the input charge control signal generator further comprises an integrator coupled to integrate the scaled current signal to generate the input charge control signal. 10. The controller of claim 1, wherein the drive signal generator produces the drive signal to be coupled to control the switch of the power supply to regulate an output current of the power supply. 11. The controller of claim 1, wherein the switch and the controller are integrated into a single monolithic integrated device. 12. A power supply controller comprising: a first input to be coupled to receive an input voltage sense signal representative of a dc input voltage of the power supply;a second input to be coupled to receive an output voltage sense signal representative of a dc output voltage of the power supply;a third input to be coupled to receive an input current sense signal representative of an input current of the power supply;a delayed ramp generator coupled to generate a delayed ramp signal;an integrator coupled to integrate the input current sense signal to generate an input charge signal;an arithmetic operator circuit coupled to generate an input charge control signal responsive to the input charge signal and a ratio of the input voltage sense signal to the output voltage sense signal; anda drive signal generator coupled to receive the delayed ramp signal and the input charge control signal and to regulate an output of the power supply, wherein the drive signal generator produces a drive signal responsive to the input charge control signal and the delayed ramp signal, the drive signal to be coupled to control a switch of the power supply. 13. The controller of claim 12, wherein the delayed ramp signal includes a plurality of piecewise linear segments. 14. The controller of claim 13, wherein the plurality of piecewise linear segments includes a first segment of substantially zero slope followed by a second segment having a finite linear slope. 15. The controller of claim 12, further comprising an oscillator coupled to generate a clock signal, wherein the delayed ramp signal is generated responsive to the clock signal. 16. The controller of claim 12, wherein the drive signal generator produces the drive signal to be coupled to control the switch of the power supply to regulate an output current of the power supply. 17. The controller of claim 12, wherein the switch and the controller are integrated into a single monolithic integrated device. 18. A power supply controller comprising: a first input to be coupled to receive an input voltage sense signal representative of a dc input voltage of the power supply;a second input to be coupled to receive an output voltage sense signal representative of a dc output voltage of the power supply;a third input to be coupled to receive an input current sense signal representative of an input current of the power supply;a delayed ramp generator coupled to generate a delayed ramp signal;an arithmetic operator coupled to generate a scaled current signal that is responsive to input current sense signal and a ratio of the input voltage sense signal to the output voltage sense signal;an integrator coupled to integrate the scaled current signal to generate an input charge control signal; anda drive signal generator coupled to receive the delayed ramp signal and the input charge control signal and to regulate an output of the power supply, wherein the drive signal generator produces a drive signal responsive to the input charge control signal and the delayed ramp signal, the drive signal to be coupled to control a switch of the power supply. 19. The controller of claim 18, wherein the delayed ramp signal includes a plurality of piecewise linear segments. 20. The controller of claim 19, wherein the plurality of piecewise linear segments includes a first segment of substantially zero slope followed by a second segment having a finite linear slope. 21. The controller of claim 18, further comprising an oscillator coupled to generate a clock signal, wherein the delayed ramp signal is generated responsive to the clock signal. 22. The controller of claim 18, wherein the scaled current signal is a product of the input current sense signal multiplied by the ratio of the input voltage sense signal to the output voltage sense signal, the product further multiplied by a scaling factor. 23. The controller of claim 18, wherein the drive signal generator produces the drive signal to be coupled to control the switch of the power supply to regulate an output current of the power supply. 24. The controller of claim 18, wherein the switch and the controller are integrated into a single monolithic integrated device.