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SOI substrate and method for manufacturing SOI substrate 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/00
출원번호 US-0076793 (2008-03-24)
등록번호 US-8101466 (2012-01-24)
우선권정보 JP-2007-079946 (2007-03-26)
발명자 / 주소
  • Yamazaki, Shunpei
  • Togawa, Maki
  • Arai, Yasuyuki
출원인 / 주소
  • Semiconductor Energy Laboratory Co., Ltd.
대리인 / 주소
    Robinson, Eric J.
인용정보 피인용 횟수 : 3  인용 특허 : 51

초록

An SOI substrate and a manufacturing method of the SOI substrate, by which enlargement of the substrate is possible and its productivity can be increased, are provided. A step (A) of cutting a first single crystal silicon substrate to form a second single crystal silicon substrate which has a chip s

대표청구항

1. A manufacturing method of an SOI substrate, comprising the steps of: (A) cutting a first single crystal silicon substrate to form a plurality of second single crystal silicon substrates each of which has a chip size;(B) forming an insulating layer on one surface of each of the plurality of second

이 특허에 인용된 특허 (51)

  1. Bachrach, Robert; Law, Kam, Apparatus and method for forming a silicon film across the surface of a glass substrate.
  2. Ohori Tatsuya (Kawasaki JPX) Hanyu Isamu (Kawasaki JPX) Sugimoto Fumitoshi (Kawasaki JPX) Arimoto Yoshihiro (Kawasaki JPX), Composite semiconductor substrate and a fabrication process thereof.
  3. Henley Francois J. ; Cheung Nathan W., Controlled cleaning process.
  4. Flores, James S.; Takafuji, Yutaka; Droes, Steven R., Crystalline silicon die array and method for assembling crystalline silicon sheets onto substrates.
  5. Shunpei Yamazaki JP; Jun Koyama JP; Yoshiharu Hirakata JP; Takeshi Fukunaga JP, Electrooptical device.
  6. Yamazaki, Shunpei; Koyama, Jun; Hirakata, Yoshiharu; Fukunaga, Takeshi, Electrooptical device.
  7. Yamazaki,Shunpei; Koyama,Jun; Hirakata,Yoshiharu; Fukunaga,Takeshi, Electrooptical device.
  8. Itoga,Takashi; Takafuji,Yutaka; Yamamoto,Yoshihiro, Fabrication method of semiconductor device.
  9. Hebras, Xavier, Fabrication of hybrid substrate with defect trapping zone.
  10. Couillard, James G.; Gadkaree, Kishor P.; Mach, Joseph F., Glass-based SOI structures.
  11. Couillard, James G.; Gadkaree, Kishor P.; Mach, Joseph F., Glass-based SOI structures.
  12. Couillard,James G.; Gadkaree,Kishor P.; Mach,Joseph F., Glass-based SOI structures.
  13. Couillard,James G.; Gadkaree,Kishor P.; Mach,Joseph F., Glass-based SOI structures.
  14. Couillard,James G.; Gadkaree,Kishor P.; Mach,Joseph F., Glass-based SOI structures.
  15. Couillard,James Gregory; Gadkaree,Kishor Purushottam; Mach,Joseph Frank, Glass-based SOI structures.
  16. Beilstein ; Jr. Kenneth E. (Essex Junction VT) Bertin Claude L. (South Burlington VT) Cronin John E. (Milton VT) Howell Wayne J. (Williston VT) Leas James M. (South Burlington VT) Perlman David J. (W, Method and workpiece for connecting a thin layer to a monolithic electronic module\s surface and associated module packa.
  17. Bruel Michel,FRX ; Aspar Bernard,FRX, Method for achieving a thin film of solid material and applications of this method.
  18. So Sang Mun,KRX, Method for fabricating SOI wafer.
  19. Yokokawa Isao,JPX ; Mitani Kiyoshi,JPX, Method for manufacturing bonded wafer and bonded wafer.
  20. Bruel Michel (Veurey FRX), Method for placing semiconductive plates on a support.
  21. Aspar, Bernard; Bruel, Michel, Method for producing a thin film comprising introduction of gaseous species.
  22. Gorowitz Bernard (Clifton Park NY) Saia Richard J. (Schenectady NY) Durocher Kevin M. (Waterford NY), Method for protecting gallium arsenide mmic air bridge structures.
  23. Hiroji Aga JP; Naoto Tate JP; Kiyoshi Mitani JP, Method of Fabricating SOI wafer by hydrogen ION delamination method and SOI wafer fabricated by the method.
  24. Shunpei Yamazaki JP; Hisashi Ohtani JP, Method of fabricating a high reliable SOI substrate.
  25. Yamazaki, Shunpei; Ohtani, Hisashi, Method of fabricating a semiconductor device.
  26. Smayling Michael C. (Missouri City TX) Duane Michael P. (Houston TX), Method of making insulated gate field effect transistor with a lightly doped drain using oxide sidewall spacer and doubl.
  27. Takahashi Kunihiro (Tokyo JPX) Kojima Yoshikazu (Tokyo JPX) Takasu Hiroaki (Tokyo JPX) Matsuyama Nobuyoshi (Tokyo JPX) Niwa Hitoshi (Tokyo JPX) Yoshino Tomoyuki (Tokyo JPX) Yamazaki Tsuneo (Tokyo JPX, Method of making light valve device using semiconductive composite substrate.
  28. Shunpei Yamazaki JP, Method of manufacturing a semiconductor device.
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  33. Yamazaki,Shunpei, Method of manufacturing a semiconductor device.
  34. Knotter Dirk M. (Eindhoven NLX) Wijdenes Jacob (Eindhoven NLX), Method of manufacturing a thin silicon-oxide layer.
  35. Aspar Bernard,FRX ; Bruel Michel,FRX ; Poumeyrol Thierry,FRX, Method of producing a thin layer of semiconductor material.
  36. Aspar Bernard,FRX ; Bruel Michel,FRX ; Poumeyrol Thierry,FRX, Method of producing a thin layer of semiconductor material.
  37. Yamazaki, Shunpei, Nonvolatile memory and electronic apparatus.
  38. D\Arrigo Sebastiano (Houston TX) Smayling Michael C. (Missouri City TX), Process for making a lateral bipolar transistor in a standard CSAG process.
  39. Fukunaga Takeshi,JPX, Process for production of SOI substrate and process for production of semiconductor device.
  40. Fukunaga, Takeshi, Process for production of SOI substrate and process for production of semiconductor device.
  41. Fukunaga, Takeshi, Process for production of SOI substrate and process for production of semiconductor device.
  42. Fukunaga,Takeshi, Process for production of SOI substrate and process for production of semiconductor device.
  43. Kazuyuki Ohya JP; Masaki Fujihira JP; Kazuhiro Otsu JP; Hideki Kobayashi JP, Process for the production of electronic parts.
  44. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.
  45. Bruel,Michel, Process for the production of thin semiconductor material films.
  46. Takafuji, Yutaka; Itoga, Takashi, Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate.
  47. Takafuji,Yutaka; Itoga,Takashi, Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate.
  48. Yamazaki Shunpei,JPX ; Ohtani Hisashi,JPX ; Koyama Jun,JPX ; Fukunaga Takeshi,JPX, Semiconductor device having an SOI structure and manufacturing method therefor.
  49. Moriuchi, Noboru; Yamaguchi, Yoshiki; Tanaka, Toshihiko; Hasegawa, Norio; Kawamoto, Yoshifumi; Kimura, Shin-ichiro; Kaga, Toru; Kure, Tokuo, Semiconductor memory device with recessed array region.
  50. Takafuji,Yutaka; Itoga,Takashi, Single-crystal silicon substrate, SOI substrate, semiconductor device, display device, and manufacturing method of semiconductor device.
  51. Aihara,Shin; Koga,Hitoshi, Wafer machining adhesive tape, and its manufacturing method and using method.

이 특허를 인용한 특허 (3)

  1. Sandhu, Gurtej S., Method and structure for integrating capacitor-less memory cell with logic.
  2. Sandhu, Gurtej S., Method and structure for integrating capacitor-less memory cell with logic.
  3. Yamazaki, Shunpei; Togawa, Maki; Arai, Yasuyuki, SOI substrate and method for manufacturing SOI substrate.
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