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A method of forming a semiconductor device on a heavily doped P-type (110) semiconductor layer over a metal substrate includes providing a first support substrate and forming a P-type heavily doped (110) silicon layer overlying the first support substrate. At least a top layer of the first support s

A method of forming a semiconductor device on a heavily doped P-type (110) semiconductor layer over a metal substrate includes providing a first support substrate and forming a P-type heavily doped (110) silicon layer overlying the first support substrate. At least a top layer of the first support substrate is removable by a selective etching process with respect to the P-type heavily doped (110) silicon layer. A vertical semiconductor device structure is formed in and over the (110) silicon layer. The vertical device structure includes a top metal layer and is characterized by a current conduction in a 110 direction. The method includes bonding a second support substrate to the top metal layer and removing the first support substrate using a mechanical grinding and a selective etching process to expose a surface of the P-type heavily doped (110) silicon layer and to allow a metal layer to be formed on the surface.

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1. A method of forming a semiconductor device on a heavily doped P-type (110) semiconductor layer over a metal substrate, the method comprising: providing a first P-type semiconductor layer, the first P-type semiconductor layer being characterized by a surface crystal orientation of (110) and a firs

1. A method of forming a semiconductor device on a heavily doped P-type (110) semiconductor layer over a metal substrate, the method comprising: providing a first P-type semiconductor layer, the first P-type semiconductor layer being characterized by a surface crystal orientation of (110) and a first conductivity, the first P-type semiconductor layer being heavily doped;forming a second P-type semiconductor layer overlying the first P-type semiconductor layer, the second P-type semiconductor layer having a surface crystal orientation of (110) and being characterized by a lower conductivity than the first conductivity;forming a top conductor layer overlying the second P-type semiconductor layer; andforming a bottom conductor layer underlying the first P-type semiconductor layer,wherein a current conduction from the top conductor layer to the bottom conductor layer and through the second p-type semiconductor layer is characterized by a hole mobility along a crystalline orientation and on a (110) crystalline plane. 2. The method of claim 1 wherein providing a first P-type semiconductor layer includes providing a first support substrate, and forming a P-type heavily doped (110) silicon layer overlying the first support substrate, at least a top layer of the first support substrate being removable by a selective etching process with respect to the P-type heavily doped (110) silicon layer. 3. The method of claim 2 wherein the first support substrate comprises an oxide layer overlying a silicon substrate. 4. The method of claim 3 wherein forming the P-type heavily doped (110) silicon layer comprises: providing a first silicon substrate, the first silicon substrate being characterized by (110) crystalline orientation, P-type conductivity, and light doping;forming a P-type heavily doped (110) silicon layer overlying the first silicon substrate;forming a first oxide layer overlying the P-type heavily doped (110) silicon layer;implanting hydrogen ions into the heavily doped (110) silicon layer to form a region therein sufficiently weakened by the hydrogen to allow cleaving the heavily doped (110) silicon layer along the region to form an upper (110) layer and a lower (110) layer;bonding the first substrate to the first support substrate; andcleaving the P-type heavily doped (110) silicon layer along the region leaving the lower (110) layer bonded to the second silicon dioxide layer overlying the support substrate. 5. The method of claim 3 wherein the removing of the first support substrate comprises: grinding the silicon substrate;etching the remaining silicon substrate using the oxide layer as an etch stop; andetching the oxide layer using the P-type heavily doped (110) silicon layer as an etch stop. 6. The method of claim 2 wherein the first support substrate comprises a silicon substrate characterized by (110) crystalline orientation, P-type conductivity, and light doping. 7. The method of claim 6 wherein forming the P-type heavily doped (110) silicon layer comprises using an epitaxial process including in-situ doping. 8. The method of claim 6 wherein forming the P-type heavily doped (110) silicon layer including using an ion implantation process. 9. The method of claim 6 wherein removing the first support substrate comprises etching the silicon substrate using the heavily doped P-type silicon layer as an etch stop. 10. The method of claim 6 wherein removing the first support substrate comprises removing the silicon substrate using a wet etching process including KOH or EDP. 11. The method of claim 2 further comprising: forming a vertical semiconductor device structure in and over the P-type heavily doped (110) silicon layer and the second P-type semiconductor layer, the vertical semiconductor device structure being characterized by a current conduction in a (110) plane and in a direction;bonding a second support substrate to the top metal layer; andremoving the first support substrate to expose a surface of the P-type heavily doped (110) silicon layer, at least the top layer in the first support substrate being removed using a selective etching process with respect to the P-type heavily doped (110) silicon layer. 12. The method of claim 11 wherein forming the vertical semiconductor device structure comprises forming a lightly doped (110) epitaxial layer on P-type heavily doped (110) silicon layer and forming a trench structure in and over the epitaxial layer.