Method of rotating data in a plurality of processing elements
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-015/76
출원번호
US-0048082
(2011-03-15)
등록번호
US-8135940
(2012-03-13)
우선권정보
GB-0309194.9 (2003-04-23)
발명자
/ 주소
Beaumont, Mark
출원인 / 주소
Micron Technologies, Inc.
대리인 / 주소
Jones Day
인용정보
피인용 횟수 :
0인용 특허 :
38
초록▼
A method of rotating data in a plurality of processing elements comprises a plurality of shifting operations and a plurality of storing operations, with the shifting and storing operations coordinated to enable a three shears operation to be performed on the data. The plurality of storing operations
A method of rotating data in a plurality of processing elements comprises a plurality of shifting operations and a plurality of storing operations, with the shifting and storing operations coordinated to enable a three shears operation to be performed on the data. The plurality of storing operations is responsive to the processing element's positions.
대표청구항▼
1. A method of rotating data in a plurality of processing elements, comprising: a plurality of shifting operations, each shifting operation being performed using a plurality of rows or columns of processing elements connected in an array, and being preformed such that each processing element in each
1. A method of rotating data in a plurality of processing elements, comprising: a plurality of shifting operations, each shifting operation being performed using a plurality of rows or columns of processing elements connected in an array, and being preformed such that each processing element in each row or column receives the data originally held by every other processing element in that row or column, respectively; anda plurality of selecting operations performed by said plurality of processing elements on said received data, where each of the received data is a candidate for selection, said shifting and selecting operations coordinated to enable a three shears operation to be performed on the data. 2. The method of claim 1, wherein said plurality of selecting operations are responsive to initial counts which are either loaded into at least certain of said processing elements or calculated locally based on the processing element's location. 3. The method of claim 2, additionally comprising maintaining a current count in each processing element for each initial count, said current counts being responsive to said initial counts and the number of data shifts performed. 4. The method of claim 3, wherein said maintaining current counts includes altering said initial counts at programmable intervals by a programmable amount. 5. The method of claim 4, wherein said initial counts are decremented in response to a shifting of data to produce said current counts. 6. The method of claim 5, wherein a selecting operation is performed when a current count in a processing element is non-positive. 7. The method of claim 1, additionally comprising selecting which processing elements are active in response to a row select signal and a column select signal. 8. A computer readable memory device carrying a set of instructions which, when executed, perform a method comprising: a plurality of shifting operations, each shifting operation being performed using a plurality of rows or columns of processing elements connected in an array, and being preformed such that each processing element in each row or column receives the data originally held by every other processing element in that row or column, respectively; anda plurality of selecting operations performed using said plurality of processing elements on said received data, where each of the received data is a candidate for selection, said shifting and selecting operations coordinated to enable a three shears operation to be performed on the data. 9. The memory device of claim 8, wherein said plurality of selecting operations are responsive to initial counts which are either loaded into at least certain of said processing elements or calculated locally based on the processing element's location. 10. The memory device of claim 9, wherein the method additionally comprises maintaining a current count in each processing element for each initial count, said current counts being responsive to said initial counts and the number of data shifts performed. 11. The memory device of claim 10, wherein said maintaining current counts includes altering said initial counts at programmable intervals by a programmable amount. 12. The memory device of claim 11, wherein said initial counts are decremented in response to a shifting of data to produce said current counts. 13. The memory device of claim 12, wherein a selecting operation is performed when a current count in a processing element is non-positive. 14. The memory device of claim 8, wherein the method additionally comprises selecting which processing elements are active in response to a row select signal and a column select signal.
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