Anti-reflection structures for CMOS image sensors
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-031/10
H01L-031/112
출원번호
US-0770349
(2010-04-29)
등록번호
US-8138534
(2012-03-20)
발명자
/ 주소
Adkisson, James W.
Ellis-Monaghan, John J.
Gambino, Jeffrey P.
Musante, Charles F.
출원인 / 주소
International Business Machines Corporation
대리인 / 주소
Scully, Scott, Murphy & Presser, P.C.
인용정보
피인용 횟수 :
8인용 특허 :
52
초록▼
Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberanc
Optical structures having an array of protuberances between two layers having different refractive indices are provided. The array of protuberances has vertical and lateral dimensions less than the wavelength range of lights detectable by a photodiode of a CMOS image sensor. The array of protuberances provides high transmission of light with little reflection. The array of protuberances may be provided over a photodiode, in a back-end-of-line interconnect structure, over a lens for a photodiode, on a backside of a photodiode, or on a window of a chip package.
대표청구항▼
1. A semiconductor structure comprising: a photodiode located in a semiconductor layer;a transistor located on said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode;an interconnect level dielectric layer embedding a metal line and located on s
1. A semiconductor structure comprising: a photodiode located in a semiconductor layer;a transistor located on said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode;an interconnect level dielectric layer embedding a metal line and located on said semiconductor layer; anda protuberance-containing dielectric portion located directly on said interconnect level dielectric layer, wherein said protuberance-containing dielectric portion comprises an array of protuberances, wherein a pitch of said array of protuberances is less than 270 nm. 2. The semiconductor structure of claim 1, wherein said pitch is a sub-lithographic dimension. 3. The semiconductor structure of claim 1, wherein said array is a regular hexagonal array. 4. The semiconductor structure of claim 1, wherein each of said protuberances has a shape of a cone having a monotonically decreasing cross-sectional area as a function of a vertical distance from a base of said cone. 5. The semiconductor structure of claim 1, further comprising a flat dielectric portion located directly on said interconnect level dielectric layer and having a same composition as said protuberance-containing dielectric portion. 6. The semiconductor structure of claim 5, wherein said flat dielectric portion has a first thickness, and wherein each of said protuberances has a height from a base to an apex, and wherein said protuberance-containing dielectric portion comprises a constant thickness portion abutting each base of said protuberances and having a second thickness, wherein said first thickness is substantially equal to a sum of said second thickness and said height. 7. A semiconductor structure comprising: a photodiode located in a semiconductor layer;a transistor located on said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode;an interconnect level dielectric layer embedding a metal line and located on said semiconductor layer; anda protuberance-containing dielectric portion located directly on said interconnect level dielectric layer, wherein said protuberance-containing dielectric portion comprises an array of protuberances, wherein said array is a regular hexagonal array. 8. The semiconductor structure of claim 7, wherein a pitch of said array of protuberances is less than 270 nm. 9. The semiconductor structure of claim 8, wherein said pitch is a sub-lithographic dimension. 10. The semiconductor structure of claim 7, wherein each of said protuberances has a shape of a cone having a monotonically decreasing cross-sectional area as a function of a vertical distance from a base of said cone. 11. The semiconductor structure of claim 7, further comprising a flat dielectric portion located directly on said interconnect level dielectric layer and having a same composition as said protuberance-containing dielectric portion. 12. The semiconductor structure of claim 11, wherein said flat dielectric portion has a first thickness, and wherein each of said protuberances has a height from a base to an apex, and wherein said protuberance-containing dielectric portion comprises a constant thickness portion abutting each base of said protuberances and having a second thickness, wherein said first thickness is substantially equal to a sum of said second thickness and said height. 13. A semiconductor structure comprising: a photodiode located in a semiconductor layer;a transistor located on said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode;an interconnect level dielectric layer embedding a metal line and located on said semiconductor layer; anda protuberance-containing dielectric portion located directly on said interconnect level dielectric layer, wherein said protuberance-containing dielectric portion comprises an array of protuberances, wherein each of said protuberances has a shape of a cone having a monotonically decreasing cross-sectional area as a function of a vertical distance from a base of said cone. 14. The semiconductor structure of claim 13, wherein a pitch of said array of protuberances is less than 270 nm. 15. The semiconductor structure of claim 14, wherein said pitch is a sub-lithographic dimension. 16. The semiconductor structure of claim 13, wherein said array is a regular hexagonal array. 17. The semiconductor structure of claim 13, further comprising a flat dielectric portion located directly on said interconnect level dielectric layer and having a same composition as said protuberance-containing dielectric portion. 18. The semiconductor structure of claim 17, wherein said flat dielectric portion has a first thickness, and wherein each of said protuberances has a height from a base to an apex, and wherein said protuberance-containing dielectric portion comprises a constant thickness portion abutting each base of said protuberances and having a second thickness, wherein said first thickness is substantially equal to a sum of said second thickness and said height. 19. A semiconductor structure comprising: a photodiode located in a semiconductor layer;a transistor located on said semiconductor layer, wherein a source of said transistor is of integral construction with said photodiode;an interconnect level dielectric layer embedding a metal line and located on said semiconductor layer;a protuberance-containing dielectric portion located directly on said interconnect level dielectric layer, wherein said protuberance-containing dielectric portion comprises an array of protuberances; anda flat dielectric portion located directly on said interconnect level dielectric layer and having a same composition as said protuberance-containing dielectric portion. 20. The semiconductor structure of claim 19, wherein a pitch of said array of protuberances is less than 270 nm. 21. The semiconductor structure of claim 20, wherein said pitch is a sub-lithographic dimension. 22. The semiconductor structure of claim 19, wherein said array is a regular hexagonal array. 23. The semiconductor structure of claim 19, wherein each of said protuberances has a shape of a cone having a monotonically decreasing cross-sectional area as a function of a vertical distance from a base of said cone. 24. The semiconductor structure of claim 19, wherein said flat dielectric portion has a first thickness, and wherein each of said protuberances has a height from a base to an apex, and wherein said protuberance-containing dielectric portion comprises a constant thickness portion abutting each base of said protuberances and having a second thickness, wherein said first thickness is substantially equal to a sum of said second thickness and said height.
연구과제 타임라인
LOADING...
LOADING...
LOADING...
LOADING...
LOADING...
이 특허에 인용된 특허 (52)
Woskov Paul P. (Bedford MA) Cohn Daniel R. (Chestnut Hill MA) Titus Charles H. (Newtown Square PA) Wittle J. Kenneth (Chester Springs PA) Surma Jeffrey E. (Kennewick WA), Active radiometer for self-calibrated furnace temperature measurements.
Tennant, William E.; Kozlowski, Lester; Tomasini, Alfredo, Active-passive imager pixel array with small groups of pixels having short common bus lines.
Rao Valluri R. ; Greason Jeffrey K. ; Livengood Richard H., Method and apparatus for distributing a clock on the silicon backside of an integrated circuit.
Masso Jon D. (Whitinsville MA) Brennan William D. (Woodstock CT) Rotenberg Don H. (Westboro MA), Method imparting anti-static, anti-reflective properties to ophthalmic lenses.
Harker Alan B. (Thousand Oaks CA) DeNatale Jeffrey F. (Thousand Oaks CA) Hood Patrick J. (Beavercreek OH) Flintoff John F. (Thousand Oaks CA), Method of fabricating of diamond moth-eye surface.
Pettigrew Robert M. (Foxton GB3) Humberstone Victor C. (Stapleford GB3) Gardner Keith (Trumpington GB3) Longman Robert J. (Coton GB3) Helfet Peter R. (London GB3), Optical data storage medium.
Longman Robert J. (Coton GB2) Helfet Peter R. (London GB2) Storey Philip A. (Thriplow GB2), Pre-formatted moth-eye type optical data storage member and method.
Ema, Taiji; Kojima, Hideyuki; Anezaki, Toru, Semiconductor integrated circuit device having improved punch-through resistance and production method thereof, semiconductor integrated circuit device including a low-voltage transistor and a high-voltage transistor.
Vora, Madhukar B., Seemless tiling and high pixel density in a 3D high resolution x-ray sensor with integrated scintillator grid for low noise and high image quality.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.