IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0291101
(2008-11-05)
|
등록번호 |
US-8143703
(2012-03-27)
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발명자
/ 주소 |
- Heald, David L.
- Cruden, Karen Chu
- Duan, Xiangfeng
- Liu, Chao
- Parce, J. Wallace
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
14 인용 특허 :
65 |
초록
▼
Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are a
Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices).
대표청구항
▼
1. A device comprising: a first layer, a second layer, a cavity between the first and second layers, one or more spacers, and at least one aperture;wherein the one or more spacers are positioned between the first and second layers and maintain a distance between the first and second layers;wherein t
1. A device comprising: a first layer, a second layer, a cavity between the first and second layers, one or more spacers, and at least one aperture;wherein the one or more spacers are positioned between the first and second layers and maintain a distance between the first and second layers;wherein the at least one aperture connects the cavity with an exterior atmosphere;wherein the cavity is occupied by a population of nanostructures; andwherein the first layer comprises a coating, which coating comprises a composition comprising a nanostructure association group. 2. The device of claim 1, wherein the nanostructures are dispersed in at least one solvent. 3. The device of claim 1, wherein the nanostructures are substantially free of solvent. 4. The device of claim 1, wherein the nanostructures comprise an array disposed on the first layer. 5. The device of claim 4, wherein the array comprises an ordered array. 6. The device of claim 4, wherein the array comprises a monolayer. 7. The device of claim 6, wherein the array comprises a hexagonal-close-packed monolayer. 8. The device of claim 4, wherein the array comprises a disordered array. 9. The device of claim 1, wherein the first layer is substantially planar, the second layer is substantially planar, and the first and second layers are substantially parallel to each other. 10. The device of claim 1, wherein the first layer comprises a material selected from the group consisting of: a dielectric material, an oxide, a nitride, silicon oxide, hafnium oxide, and alumina. 11. The device of claim 1, wherein the first layer is disposed on a substrate. 12. The device of claim 1, wherein the second layer comprises a metal or a dielectric material. 13. The device of claim 1, wherein the first layer has four edges; wherein the first and second layers are separated by two spacers, which spacers run along two opposite edges of the first layer; and wherein two apertures connect the cavity with the exterior atmosphere, which apertures run along the remaining two opposite edges of the first layer. 14. The device of claim 1, wherein the nanostructures comprise substantially spherical nanostructures or quantum dots. 15. The device of claim 1, wherein the first layer comprises or is disposed on a first conductive material and wherein the second layer comprises or is disposed on a second conductive material. 16. A device comprising: a first layer, a second layer, a cavity between the first and second layers, one or more spacers, and at least one aperture;wherein the one or more spacers are positioned between the first and second layers and maintain a distance between the first and second layers;wherein the at least one aperture connects the cavity with an exterior atmosphere;wherein the cavity is occupied by a population of nanostructures; andwherein the distance between the first and second layers is is greater than an average diameter of the nanostructures and less than about two times the average diameter of the nanostructures. 17. A device comprising: a solid support comprising a first layer and at least one vertical discontinuity on its surface, which discontinuity comprises a protrusion from the surface or an indentation in the surface, which protrusion or indentation is at a predetermined position on the solid support;a population of nanostructures disposed on the protrusion or in the indentation; andwherein the first layer comprises a coating, which coating comprises a composition comprising a nanostructure association group. 18. The device of claim 17, wherein the nanostructures are dispersed in at least one solvent. 19. The device of claim 17, wherein the nanostructures are substantially free of solvent. 20. The device of claim 17, wherein the nanostructures comprise an array disposed on the protrusion or in the indentation. 21. The device of claim 20, wherein the array comprises an ordered array. 22. The device of claim 20, wherein the array comprises a monolayer. 23. The device of claim 22, wherein the array comprises a hexagonal-close-packed monolayer. 24. The device of claim 20, wherein the array comprises a disordered array. 25. The device of claim 17, wherein the first layer comprises a material selected from the group consisting of: a dielectric material, an oxide, a nitride, silicon oxide, hafnium oxide, and alumina. 26. The device of claim 17, wherein the solid support comprises a substrate on which the first layer is disposed. 27. The device of claim 17, wherein the nanostructures comprise substantially spherical nanostructures or quantum dots. 28. A device comprising: a substrate;two or more nanostructure arrays disposed on the substrate, wherein each nanostructure array is disposed at a predetermined position on the substrate; andwherein each of the nanostructures comprising the arrays comprises a coating comprising a ligand associated with a surface of the nanostructure. 29. The device of claim 28, wherein the substrate comprises a quartz substrate or a silicon wafer or a portion thereof. 30. The device of claim 28, wherein the substrate comprises a semiconductor. 31. The device of claim 30, wherein a first layer is disposed between the nanostructure arrays and the substrate. 32. The device of claim 31, wherein the first layer comprises a dielectric material and has a thickness of between about 1 nm and about 10 nm. 33. The device of claim 32, wherein, for each monolayer array of nanostructures, the substrate comprises a source region, a drain region, and a channel region between the source and drain regions and underlying the monolayer array of nanostructures; wherein a control dielectric layer is disposed on each monolayer array of nanostructures; and wherein a gate electrode is disposed on each control dielectric layer. 34. The device of claim 28, wherein each nanostructure array comprises a monolayer. 35. The device of claim 34, wherein each nanostructure array comprises a hexagonal-close-packed monolayer. 36. The device of claim 28, wherein each nanostructure array comprises a disordered array. 37. The device of claim 28, wherein each nanostructure array has a density greater than about 1×1010 nanostructures/cm2, greater than about 1×1011 nanostructures/cm2, greater than about 1×1012 nanostructures/cm2, or greater than about 1×1013 nanostructures/cm2. 38. The device of claim 28, wherein each nanostructure array has an area of about 2025 nm2 or less, about 1225 nm2 or less, about 625 nm2 or less, or about 324 nm2 or less. 39. The device of claim 38, wherein each nanostructure array has dimensions of about 45×45 nm or less, about 35×35 nm or less, about 25×25 nm or less, or about 18×18 nm or less. 40. The device of claim 28, wherein the two or more nanostructure arrays disposed on the substrate comprise 10 or more, 50 or more, 100 or more, 1000 or more, 1×104 or more, 1×106 or more, 1×109 or more, or 1×1012 or more nanostructure arrays. 41. The device of claim 28, wherein the nanostructures comprising the arrays comprise substantially spherical nanostructures or quantum dots. 42. The device of claim 28, wherein the nanostructures comprising the arrays have a work function of about 4.5 eV or higher. 43. The device of claim 28, wherein the nanostructures comprising the arrays are preformed. 44. The device of claim 28, wherein the nanostructures comprising the arrays are encompassed by SiO2 shells. 45. The device of claim 28, wherein each nanostructure array comprises an ordered array. 46. A device comprising: a solid support comprising a first layer and at least one vertical discontinuity on its surface, which discontinuity comprises a protrusion from the surface or an indentation in the surface, which protrusion or indentation is at a predetermined position on the solid support;a population of nanostructures disposed on the protrusion or in the indentation;wherein the solid support comprises a plurality of protrusions from the surface or a plurality of indentations in the surface, which protrusions or indentations are at predetermined positions on the solid support; andwherein the nanostructures are dispersed in at least one solvent, and wherein the nanostructures and the solvent are distributed over the entire surface of the solid support. 47. The device of claim 46, wherein the nanostructures comprise a plurality of arrays disposed on the plurality of protrusions or in the plurality of indentations. 48. The device of claim 47, wherein the surface between the protrusions or indentations is substantially free of nanostructures.
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