초록 ▼

In one embodiment, a solar cell installation includes several groups of solar cells. Each group of solar cells has a local power point optimizer configured to control power generation of the group. The local power point optimizer may be configured to determine an optimum operating condition for a co

In one embodiment, a solar cell installation includes several groups of solar cells. Each group of solar cells has a local power point optimizer configured to control power generation of the group. The local power point optimizer may be configured to determine an optimum operating condition for a corresponding group of solar cells. The local power point optimizer may adjust the operating condition of the group to the optimum operating condition by modulating a transistor, such as by pulse width modulation, to electrically connect and disconnect the group from the installation. The local power point optimizer may be used in conjunction with a global maximum power point tracking module.

대표청구항 ▼

1. A solar cell installation comprising: a plurality of groups of solar cells, the plurality of groups of solar cells being serially interconnected to generate an overall output power to a load;a separate local power point optimizer for each group of solar cells in the plurality of groups of solar c

1. A solar cell installation comprising: a plurality of groups of solar cells, the plurality of groups of solar cells being serially interconnected to generate an overall output power to a load;a separate local power point optimizer for each group of solar cells in the plurality of groups of solar cells and serially interconnects a corresponding group of solar cells to other groups of solar cells in the plurality of groups of solar cells, the local power point optimizer including a power point controller configured to modulate a first transistor to electrically connect and disconnect the corresponding group of solar cells to the installation to adjust a bias point of the corresponding group of solar cells to deliver maximum power as determined by the local power point optimizer; anda maximum power point tracking module configured to adjust an operating point of the plurality of groups of solar cells to maximize the overall output power to the load as determined by the maximum power point tracking module;wherein the separate local power point optimizer for each group of solar cells in the plurality of groups of solar cells further comprises an output stage at the output of the separate local power point optimizer, the output stage being configured to filter a voltage output of the corresponding group of solar cells. 2. The solar cell installation of claim 1 wherein the local power point optimizer synchronously controls the first transistor and a second transistor to adjust the bias point of the corresponding group of solar cells, the second transistor providing a current path through the corresponding group of solar cells when the first transistor is switched OFF. 3. The solar cell installation of claim 2 wherein the first transistor comprises a PFET and the second transistor comprises an NFET. 4. The solar cell installation of claim 1 wherein the output stage comprises an inductor having a first end and a second end and a capacitor having a first end and a second end, the first end of the inductor being coupled to the first transistor, the second end of the inductor being coupled to a first end of the capacitor, the second end of the capacitor being coupled to another local power point optimizer of another group of solar cells in the plurality of solar cells. 5. The solar cell installation of claim 1 wherein the first transistor comprises a PFET. 6. The solar cell installation of claim 1 wherein the first transistor comprises an NFET. 7. The solar cell installation of claim 6 further comprising a voltage source configured to provide additional voltage to a gate of the first transistor to allow the first transistor to be switched ON. 8. The solar cell installation of claim 1 further comprising a diode across the corresponding group of solar cells, the diode being configured to be reversed bias during normal operation of the corresponding group of solar cells. 9. The solar cell installation of claim 1 further comprising a capacitor configured to be charged by the corresponding group of solar cells when the first transistor is switched OFF. 10. A solar cell installation comprising: a plurality of serially interconnected groups of solar cells;an electrical circuit in each group of solar cells in the plurality of serially interconnected groups of solar cells, the electrical circuit serially interconnecting a corresponding group of solar cells to other groups of solar cells in the plurality of serially interconnected groups of solar cells, the electrical circuit being configured to determine an operating condition of the corresponding group of solar cells where the corresponding group of solar cells generates a target power output and to adjust the corresponding group of solar cells to operate at the determined operating condition, the electrical circuit in each group of solar cells in the plurality of serially interconnected groups of solar cells further comprising an output filter stage, the output filter stage comprising an inductor at the output of the electrical circuit. 11. The solar cell installation of claim 10 wherein the electrical circuit modulates a first transistor to electrically connect and disconnect the corresponding group of solar cells from the installation such that the corresponding group of solar cells generates the target power output. 12. The solar cell installation of claim 11 wherein the electrical circuit synchronously switches the first transistor and a second transistor to electrically connect and disconnect the corresponding group of solar cells from the installation such that the corresponding group of solar cells generates the target power output. 13. The solar cell installation of claim 12 wherein the first transistor comprises a PFET and the second transistor comprises an NFET. 14. The solar cell installation of claim 11 wherein the first transistor comprises an NFET.