A switching device comprising one or more processors coupled to a media access control (MAC) interface and a memory structure for switching packets rapidly between one or more source devices and one or more destination devices. Packets are pipelined through a series of first processing segments to p
A switching device comprising one or more processors coupled to a media access control (MAC) interface and a memory structure for switching packets rapidly between one or more source devices and one or more destination devices. Packets are pipelined through a series of first processing segments to perform a plurality of first sub-operations involving the initial processing of packets received from source devices to be buffered in the memory structure. Packets are pipelined through a series of second processing segments to perform a plurality of second sub-operations involved in retrieving packets from the memory structure and preparing packets for transmission. Packets are pipelined through a series of third processing segments to perform a plurality of third sub-operations involved in scheduling transmission of packets to the MAC interface for transmission to one or more destination devices.
대표청구항▼
1. A system comprising: a backplane;a first pipeline comprising a first packet processor, a first memory, and a backplane manager, wherein the first packet processor is configured to process a packet received by the system and to store packet data corresponding to the packet in the first memory, and
1. A system comprising: a backplane;a first pipeline comprising a first packet processor, a first memory, and a backplane manager, wherein the first packet processor is configured to process a packet received by the system and to store packet data corresponding to the packet in the first memory, and wherein the backplane manager is configured to read the packet data from the first memory, compute an appropriate destination for the packet data, and dispatch the packet data to the backplane;a second pipeline comprising a transmission accumulator, a second memory, and a second packet processor, wherein the transmission accumulator is configured to receive packet data from the backplane and store the packet data in the second memory, and wherein the second packet processor is configured to read the packet data from the second memory and schedule transmission of the packet from the system; anda path for forwarding the packet data from the first memory to the transmission accumulator without using the backplane. 2. The system of claim 1 further comprising: a media access controller (MAC), wherein the MAC is configured to forward the packet received by the system to the first packet processor, and wherein the MAC is configured to receive the packet from the second packet processor and transmit the packet received from the second packet processor from the system. 3. The system of claim 1 further comprising: a CAM processor;wherein the first packet processor is configured to extract forwarding information from the packet; andwherein the CAM processor is configured to perform a lookup using the forwarding information. 4. The system of claim 1 wherein the first packet processor is configured to generate a packet header for forwarding the packet through the system. 5. The system of claim 1 wherein the first memory is a dual-port memory that enables the first processor to store the packet data in the first memory independent of processing performed by the backplane manager. 6. The system of claim 1 wherein at least one of the first packet processor, the backplane manager, the transmission accumulator, and the second packet processor is a field programmable gate array (FPGA). 7. The system of claim 1 wherein at least one of the first packet processor, the second packet processor, and the backplane manager is an application-specific integrated circuit (ASIC). 8. The system of claim 1 wherein the second memory comprises a series of first-in first-out structures for the packet data received via the path. 9. A method comprising: providing, in a network device, a first pipeline comprising a first packet processor, a first memory, and a backplane manager, wherein the first packet processor is configured to process a packet received by the system and to store packet data corresponding to the packet in the first memory, and wherein the backplane manager is configured to read the packet data from the first memory, compute an appropriate destination for the packet data, and dispatch the packet data to a backplane;providing, in the network device, a second pipeline comprising a transmission accumulator, a second memory, and a second packet processor, wherein the transmission accumulator is configured to receive packet data from the backplane and store the packet data in the second memory, and wherein the second packet processor is configured to read the packet data from the second memory and schedule transmission of the packet from the system; andenabling the packet data to be forwarded from the first memory to the transmission accumulator without using the backplane. 10. The method of claim 9 wherein: forwarding the packet received by a media access controller (MAC) to the first packet processor;forwarding the packet scheduled for transmission from the second packet processor to the MAC; andforwarding the packet from the network device using the MAC. 11. The method of claim 9 further comprising: extracting, by the first packet processor, forwarding information from the packet; andperforming a lookup in a CAM using the forwarding information. 12. The method of claim 9 further comprising: generating, by the first packet processor, a packet header for forwarding the packet through the network device. 13. The method of claim 9 wherein: the first memory is a dual-port memory; andenabling the first processor to store the packet data in the first memory independent of processing performed by the backplane manager. 14. The method of claim 9 wherein at least one of the first packet processor, the backplane manager, the transmission accumulator, and the second packet processor is a field programmable gate array (FPGA). 15. The method of claim 9 wherein at least one of the first packet processor, the second packet processor, and the backplane manager is an application-specific integrated circuit (ASIC). 16. The method of claim 9 further comprising detecting when packet data stored in the first memory is to be forwarded to the transmission accumulator without using the backplane. 17. The method of claim 9 further comprising providing a series of first-in first-out structures in the second memory for the packet data received via the path.
연구과제 타임라인
LOADING...
LOADING...
LOADING...
LOADING...
LOADING...
이 특허에 인용된 특허 (296)
Holden Brian D., ATM architecture and switching element.
Dittia, Zubin D.; Eatherton, William N.; Fingerhut, John Andrew; Galles, Michael B.; Turner, Jonathan S., Accumulating and distributing flow control information via update messages and piggybacked flow control information in other messages in a packet switching system.
James,David V.; Rajamanickam,Jagadeesan, Apparatus and method for associating information values with portions of a content addressable memory (CAM) device.
Kalkunte Mohan ; Kadambi Jayant ; Merchant Shashank, Apparatus and method in a network switch for dynamically allocating bandwidth in ethernet workgroup switches.
Olnowich Howard Thomas ; Dotson Michael Wayland ; Feeney James William ; Fisher Michael Hans ; Jabusch John David ; Lusch Robert Francis ; Maniguet Michael Anthony, Apparatus for coupling a bus-based architecture to a switch network.
Pauwels Bart J. G. (Borgerhout BEX) Henrion Michel A. R. (Brussels BEX), Asynchronous switching node and routing logic means for a switching element used therein.
Gerard Chauvel FR; Serge Lasserre FR; Mario Giani FR; Tiemen Spits ; Gerard Benbassat FR; Frank L. Laczko, Sr. ; Y. Paul Chiang ; Karen L. Walker ; Mark E. Paley ; Brian O. Chae, Audio and video decoder circuit and system.
Quirke, Jeff; Spagnolo, Gianfranco; Schulz, Jeff; Lepper, Matthew; Bianchini, Jr., Ronald P., Backplane synchronization in a distributed system with clock drift and transport delay.
Sato, Koji, COMMUNICATION APPARATUS, SYNCHRONOUS COMMUNICATION SYSTEM, COMMUNICATION INTERFERENCE SUPPRESS METHOD AND COMPUTER-READABLE RECORDING MEDIUM RECORDED WITH COMMUNICATION INTERFERENCE SUPPRESS PROGRAM .
Chikazawa Tsutomu,JPX ; Wakabayashi Jun,JPX ; Iwasaki Masaaki,JPX ; Nakazumi Seiji,JPX, Communication device for switching connection from a working channel line to a protection channel line and vice versa.
Farrell Robert J. (Hampton Wakefield MA) Coit Kenneth T. (Hampton Milford NH) Vernon John H. (Hampton Milford MA) Yu Kin C. (Hampton Burlington MA) Huettner Robert E. (Hampton Acton MA) Grandmaison J, Communication line service interrupt technique for a communications processing system.
Keenan, Ronald M.; Barraza, Thomas F.; Caceres, Edward R.; Deptula, Joseph A.; Evans, Patrick A.; Setaro, Joseph, Communication switching module for the transmission and control of audio, video, and computer data over a single network fabric.
Ogawa Tetsuo,JPX ; Satoh Hiroshi,JPX, Data receiving device which enables simultaneous execution of processes of a plurality of protocol hierarchies and gener.
Basso, Claude; Calvignac, Jean Louis; Heddes, Marco C.; Logan, Joseph Franklin; Verplanken, Fabrice Jean, Data structures for efficient processing of IP fragmentation and reassembly.
Swanbery Adam R. ; Collin Dit de Montesson Christian,FRX ; Accarion Michel,FRX ; Williamson David E. ; Makris Perry W. ; White Jonathan B. ; Brethome Jean-Claude,FRX, Digital communications switching fabric.
Inoue Sadayuki,JPX ; Shinohara Junko,JPX ; Yamasaki Tatsuo,JPX, Digital video signal playback device with special playback data being in the form of a still image slice data.
Muller Shimon ; Yeung Louise ; Hendel Ariel, Distributed VLAN mechanism for packet field replacement in a multi-layered switched network element using a control field/signal for indicating modification of a packet with a database search engine.
Wiher Christian R. (Redondo Beach CA) Miller Christopher J. (Manhattan Beach CA) Salamone Michael J. (Torrance CA) Mullin Jeffrey L. (Manhattan Beach CA), Expandable high speed serial data switch.
Boucher, Laurence B.; Blightman, Stephen E. J.; Craft, Peter K.; Higgen, David A.; Philbrick, Clive M.; Starr, Daryl D., Fast-path apparatus for receiving data corresponding to a TCP connection.
Kuhlmann, Charles Edward; Lingafelt, Charles Steven; Noel, Jr., Francis Edward; Rincon, Ann Marie; Strole, Norman Clark, Field programmable network processor and method for customizing a network processor.
Klausmeier Daniel E. (Sunnyvale CA) Corbalis Charles M. (Saratoga CA) Hooshmand Kambiz (Santa Clara CA), Frame based traffic policing for a digital switch.
Hilton Hong ; Juan Grau ; Arthur Coleman ; Rick R. Giles, Frequency hopping medium access control protocol for a communication system having distributed synchronization.
Bailis Robert Thomas ; Bonds ; Jr. Thomas Lee ; Draughn Roy Lee ; Genzlinger Alvin Dean ; Jensen David John ; Lingafelt Charles Steven ; Oakley Brian Scott ; Ward Michael James, Hot plug of adapters using optical switches.
Berenbaum Alan David ; Fraser Alexander Gibson ; McLellan ; Jr. Hubert Rae, In-band device configuration protocol for ATM transmission convergence devices.
Parruck, Bidyut; Nguyen, Joseph A.; Ramakrishnan, Chulanur, Integrated ATM/packet segmentation-and-reassembly engine for handling both packet and ATM input data and for outputting both ATM and packet data.
Jan Bengtsson SE; Hans-Peter Nilsson SE; Kenny Ranerup SE; Ronny Ranerup SE; Per Zander SE, Integrated circuit and method for bringing an integrated circuit to execute instructions.
Caldara Stephen A. ; Hauser Stephen A. ; Manning Thomas A. ; Strouble Raymond L., Linked list structures for multiple levels of control in an ATM switch.
Wicki Thomas M. ; Larson Jeffrey D. ; Mu Albert ; Sastry Raghu, Low latency, high clock frequency plesioasynchronous packet-based crossbar switching chip system and method.
Sambamurthy Namakkal S. ; Tripathi Devendra K. ; Deb Alak K. ; Truong Linh Tien ; Kumar Praveen D., Media access control receiver and network management system.
Pradeep S. Sindhu ; Dennis C. Ferguson ; Bjorn O. Liencres ; Nalini Agarwal ; Hann-Hwan Ju ; Raymond Marcelino Manese Lim ; Rasoul Mirzazadeh Oskouy ; Sreeram Veeragandham, Memory organization in a switching device.
Bryant Stewart F. (Redhill GB2) Seaman Michael J. (San Jose CA), Message processing system having separate message receiving and transmitting processors with message processing being di.
Kirk Treadaway ; Tat Huen ; Tho Le Ngoc CA, Method and apparatus for a data transmission rate of multiples of 100 MBPS in a terminal for a wireless metropolitan area network.
McDysan David E. (207 Bridge Canyon Ct. Richardson TX 75080) Farinholt Edvin V. (R.R. 4 ; Box 152A McKinney TX 75070), Method and apparatus for call control signaling.
Ferguson H. Earl ; Prince Jeffrey ; Noll Mike K. ; Ryals Randy ; Pitcher Derek H., Method and apparatus for controlling data flow within a switching device.
Lozowick Philip P. (Jerusalem ILX) Ben-Michael Siman-Tov (Girat Zeer ILX), Method and apparatus for cut-through data packet transfer in a bridge device.
Mathur Deepak ; Chen David X. ; Danenberg L. David, Method and apparatus for generating a proxy connection endpoint for operation administration and management (OAM) asynch.
Odenwalder, Joseph P.; Wei, Yongbin; Tiedemann, Jr., Edward G.; Lundby, Stein A.; Puig-Oses, David; Sarkar, Sandip, Method and apparatus for generating control information for packet data.
Randy Ryals ; Jeffrey Prince ; H. Earl Ferguson ; Mike K. Noll ; Derek H. Pitcher, Method and apparatus for managing the flow of data within a switching device.
Burke Christopher J. (Maple Valley WA) Chaffee Janice M. (Auburn WA) Nir Erez (Bellevue WA) Kee Thomas E. (Lynnwood WA), Method and apparatus for selecting between a plurality of communication paths.
Willmann Gert (Stuttgart DEX) Wippenbeck Matthias (Stuttgart DEX) Schrodi Karl (Heimsheim DEX), Method and facility for temporarily storing data packets, and exchange with such a facility.
Sim,Siew Young; Chan,Desmond Cho Hung; Huang,Tsan Fung; Chai,Wencheng; Isaacson,Trygve; Flood, Jr.,James C.; Mills,George Harlow; Orzen,Matthew, Method and system for managing distributed content and related metadata.
Weppler Robert C. ; Murphy Timothy J. ; Hutz Margarita M. ; Cribbs Alan C. ; Harris Kendal R., Method for and apparatus for operating a local communications module in arbitrating for mastership of a data transfer ac.
Hluchyj Michael G. (Wellesley MA) Bhargave Amit (Somerville MA) Yin Nanying (Cambridge MA), Method for prioritizing, selectively discarding, and multiplexing differing traffic type fast packets.
Vercellotti Leonard C. (Oakmont PA) Anderson Arthur A. (Irwin PA), Method of mapping refrigerated containers in a power line carrier based monitoring system.
Pandya, Mihir A.; Whisenhunt, Gary L., Microprocessor having a content addressable memory (CAM) device as a functional unit therein and method of operation.
Brown David A.,CAX ; Nichols Stacy W.,CAX ; Beshai Maged E.,CAX, Multi-core ATM switch with cells in the core from an inlet for an outlet being aligned.
Combs Edward A. (Lynchburg VA) Maddox Dennis M. (Rustburg VA) Imron Wim A. (Forest VA), Multisite trunked RF communication system with reliable control messaging network.
Haddock Stephen R. ; Schneider Herb ; Berg Curt ; Cimino Daniel J. ; Khattar Siddharth ; Knudstrup Matthew T. ; Lytwyn Mark Thomas ; Tyler Aaron C. ; Yip Michael, Network interconnect device and protocol for communicating data among packet forwarding devices.
Blightman,Stephen E. J.; Starr,Daryl D.; Philbrick,Clive M., Network interface device for error detection using partial CRCS of variable length message portions.
Kadambi Shiri ; Ambe Shekhar, Network switching architecture utilizing cell based and packet based per class-of-service head-of-line blocking prevention.
Yang Henry (Andover MA) Ramakrishnan K. K. (Maynard MA) Lauck Anthony (Wellesley MA), No-owner frame and multiple token removal mechanism for token ring networks.
Spinney Barry A. (Wayland MA) Simcoe Robert J. (Westboro MA) Thomas Robert E. (Hudson MA) Varghese George (Bradford MA), Packet format in hub for packet data communications system.
Nishi, Tetsuya; Kuroyanagi, Satoshi, Photonic node, photonic nodes for transmission and reception, and method of restoring traffic upon occurrence of link failure in optical path network.
Maher, III, Robert Daniel; Rana, Aswinkumar Vishanji; Lie, Milton Andre; Strother, Jr., Travis Ernest; Hervin, Mark Warden; Deerman, James Robert; Carman, John Raymond; Maxwell, Larry Gene, Policy gateway.
Juzswik David L. (Dearborn Heights MI) Webb Nathaniel (Detroit MI) Floyd William M. (Livonia MI), Power-conserving control system for turning-off the power and the clocking for data transactions upon certain system ina.
Grandmaison John P. (Hampton NH) Huettner Robert E. (Acton MA) Vernon John H. (Milford MA) Yu Kin C. (Burlington MA), Process and apparatus employing microprogrammed control commands for transferring information between a control processo.
Diehl Eric (Neudorf FRX) Hamon Joel (Lipsheim FRX) Leduc Michel (Boersch FRX), Process for authentication of smart cards, and device for use of the process.
Opher Ayal (Mountain View CA) Garg Gaurav (Mountain View CA) Kruzinski Philip (Redwood City CA) Sikdar Som (San Jose CA), Routing device utilizing an ATM switch as a multi-channel backplane in a communication network.
Yee David Moon ; Bickley Robert Henry ; Zucarelli Philip John ; Keller Theodore W. ; Osman Jeff S. ; Derr Randall K., Satellite based high bandwidth data broadcast.
Leduc Michel (Boersch FRX) Hamon Jol (Lipsheim FRX) Guillon Jean-Claude (Gerstheim FRX) Renard Francis (Ostwald FRX) Diehl Eric (Neudorf FRX), Scrambling and unscrambling method for composite video signals and implementing device.
Kunimoto Masao (Yokohama JPX) Kashio Jiro (Kawasaki JPX) Mori Makoto (Yokohama JPX) Gohara Shinobu (Yokohama JPX), Signalling apparatus for use in an ATM switching system.
Bass Brian M. ; Henderson Douglas Ray ; Ku Edward Hau-chun ; Lemke Scott J. ; Rash Joseph M. ; Reiss Loren Blair ; Ryle Thomas Eric, Simultaneous cut through and store-and-forward frame support in a network device.
Chau Wing Cheong ; Leu Darren ; Liu Tze-jian ; Nilakantan Chandy ; Pao Jeffrey Kaiping ; Sun Tsyr-Shya Joe ; Tai Wayming Daniel ; Wang Xiaohu, Supporting authentication across multiple network access servers.
Struhsaker, Paul F.; Denton, James S.; McGee, Gregory L., System and method for providing an improved common control bus for use in on-line insertion of line replaceable units in wireless and wireline access systems.
Shue Chikong ; West Jonathan B. ; Martel James A., System and method for providing unitary virtual circuit in digital network having communication links of diverse service types.
Byrne, Michael; O'Byrne, Nicola; Price, Colin; Hummerston, Derek, System and method to place a device in power down modes/states and restore back to first mode/state within user-controlled time window.
Best,Robert E.; Chandrasekaran,Ramaswamy; Rudin, III,John R.; Hu,Rose Q.; Watson,Jeff L.; Tamil,Lakshman S.; Fabbri,Alessandro, System for switching data using dynamic scheduling.
Chang, You-Sung; Chun, Jung-Bum, System, method and article of manufacture for storing an incoming datagram in switch matrix in a switch fabric chipset system.
Henrion Michel (Zaventem FRX), Temporary information storage system comprising a buffer memory storing data structured in fixed or variable length data.
LaMaire Richard O. (Yorktown Heights NY) Serpanos Dimitrios N. (Ossining NY), Two-dimensional round-robin scheduling mechanism for switches with multiple input queues.
Youden John J. ; Kovalick Albert W. ; Siccardo Paolo L. ; Adams Christopher R. ; Jensen James E. ; Coggins David John ; Thapar Manu ; Santos Kari, Video on demand system with multiple data sources configured to provide VCR-like services.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.