최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
DataON 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Edison 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
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출원번호 | US-0033027 (2001-10-22) |
등록번호 | US-8176296 (2012-05-08) |
발명자 / 주소 |
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출원인 / 주소 |
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인용정보 | 피인용 횟수 : 22 인용 특허 : 1058 |
Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory compone
Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design also includes programmable input/output blocks for coupling selected signals to external pins. The memory components also include user programs that the embedded microprocessor executes. These programs may include instructions for programming the digital and analog blocks “on-the-fly,” e.g., dynamically. In one implementation, there are a plurality of programmable digital blocks and a plurality of programmable analog blocks.
1. A microprocessor circuit, comprising: a plurality of programmable analog circuit blocks wherein said analog circuit blocks are dynamically programmable and configurable to perform one or more of a plurality of various analog function and wherein said plurality of programmable analog circuit block
1. A microprocessor circuit, comprising: a plurality of programmable analog circuit blocks wherein said analog circuit blocks are dynamically programmable and configurable to perform one or more of a plurality of various analog function and wherein said plurality of programmable analog circuit blocks comprises a matrix of n by m, n and m independently being an integer of at least two;each of said plurality of programmable analog circuit blocks is configured to provide one or more analog function and wherein said plurality of programmable analog circuit blocks are configured to be individually at different power levels;a plurality of programmable digital circuit blocks configured to provide at least one of a plurality of digital functions, wherein each programmable digital circuit block is configurable to perform any one of said digital functions upon being configured with a single register write operation;a routing matrix configured to couple a subset of said plurality of programmable analog circuit blocks to a first subset of said plurality of programmable digital circuit blocks, at least a first one of said programmable analog circuit blocks being coupled to at least a first one of said programmable digital circuit blocks; anda programmable non-volatile memory coupled directly or indirectly to said plurality of programmable digital circuit blocks and said plurality of programmable analog circuit blocks, said programmable memory comprising data for programming at least one of said programmable digital circuit blocks and at least one of said plurality of programmable analog circuit blocks. 2. The circuit as recited in claim 1, wherein when programmed, each of said plurality of programmable analog circuit blocks provides at least one of said plurality of analog functions. 3. The circuit of as recited in claim 1, wherein when programmed, each programmable digital circuit blocks provides at least one of said digital functions. 4. The circuit as recited in claim 2, wherein when programmed, said plurality of programmable analog circuit blocks and said plurality of programmable digital circuit blocks provides at least one digital and/or analog function. 5. The circuit as recited in claim 1, wherein when programmed, said routing matrix couples a second one of said subset of said plurality of programmable analog circuit blocks to a second one of said subset of said plurality of programmable digital circuit blocks. 6. The circuit as recited in claim 1, wherein each of said plurality of programmable analog circuit blocks is configured to provide one or more analog functions selected from the group consisting of a gain function, a comparator function, a switched capacitor function, a filter function, an analog to digital conversion function, a digital to analog conversion function, and an amplifier function. 7. The circuit as recited in claim 1, wherein at least two of said plurality of programmable digital circuit blocks are coupled in series to provide a digital system function. 8. A microcontroller means, comprising: a plurality of programmable analog means wherein said analog means are dynamically programmable and configurable to perform one or more of a plurality of various analog functions and wherein said plurality of programmable analog means comprises a matrix of n by m, n and m independently being an integer of at least two;each of said plurality of programmable analog means is configured to provide one or more analog functions and wherein said plurality of programmable analog means are configured to be individually at different power levels;a plurality of programmable digital means configured to provide at least one of a plurality of digital means, wherein each programmable digital means is configured to perform any one of said digital function upon being configured with a single register write operation;a routing means configured to couple a subset of said plurality of programmable analog means to a first subset of said plurality of programmable digital means, at least a first one of said programmable analog means being coupled to at least a first one of said programmable digital means; anda programmable non-volatile memory means coupled directly or indirectly to said plurality of programmable digital means and said plurality of programmable analog means, said programmable memory means comprising data for programming at least one of said programmable digital means and at least one of said plurality of programmable analog means. 9. The microcontroller means as recited in claim 8, wherein when programmed, each of said plurality of programmable analog means provides at least one of said plurality of analog function. 10. The microcontroller means as recited in claim 8, wherein when programmed, each programmable digital means provides at least one of said digital function. 11. The microcontroller means as recited in claim 8, wherein when programmed, said plurality of programmable analog means and said plurality of programmable digital means provideds at least one digital and/or analog function. 12. The microcontroller means as recited in claim 8, wherein when programmed, said routing means couples a second one of said subset of said plurality of programmable analog means to a second one of said subset of said plurality of programmable digital means. 13. The circuit as recited in claim 8, wherein each of said programmable analog means is configured to provide one or more analog means selected from the group consisting of a gain means, a comparator means, a switched capacitor means, a filter means, an analog to digital conversion means, a digital to analog conversion means, and an amplifier means. 14. The circuit as recited in claim 8, wherein at least two of said plurality of programmable digital means are coupled in series to provide a digital system function. 15. A microcontroller circuit, comprising: a microprocessor;a plurality of programmable analog circuit blocks wherein said programmable analog circuit blocks are dynamically programmable and configurable to perform one or more of a plurality of various analog functions and wherein said plurality of programmable analog circuit blocks comprises a matrix of n, by m, n and m independently being an integer of at least two;each of said plurality of programmable analog circuit blocks is configured to provide one or more analog function and wherein said plurality of programmable analog circuit blocks are configured to be individually at different power levels;a plurality of programmable digital circuit blocks configured to provide at least one of a plurality of digital functions, wherein each programmable digital circuit block is configurable to perform any one of said digital functions upon being configured with a single register write operation;a routing matrix configured to couple a subset of said plurality of programmable analog circuit blocks to a first subset of said plurality of programmable digital circuit blocks, at least a first one of said programmable analog circuit blocks being coupled to at least a first one of said programmable digital circuit blocks; anda programmable non-volatile memory coupled directly or indirectly to said plurality of programmable digital circuit blocks and said plurality of programmable analog circuit blocks, said programmable memory comprising data for programming at least one of said programmable digital circuit blocks and at least one of said plurality of programmable analog circuit blocks. 16. The circuit as recited in claim 15, wherein when programmed, each of said plurality of programmable analog circuit blocks provides at least one of said plurality of analog functions. 17. The circuit as recited in claim 15, wherein when programmed, each programmable digital circuit block provides at least one of said digital functions. 18. The circuit as recited in claim 15, wherein when programmed, said plurality of programmable analog circuit blocks and said plurality of programmable digital circuit blocks provides at least one digital and/or analog function. 19. The circuit as recited in claim 15, wherein when programmed, said routing matrix couples a second one of said subset of said plurality of programmable analog circuit blocks to a second one of said subset of said plurality of programmable digital circuit blocks. 20. The circuit as recited in claim 15, wherein each of said plurality of programmable analog circuit blocks is configured to provide one or more analog functions selected from the group consisting of a gain function, a comparator function, a switched capacitor function, a filter function, an analog to digital conversion function, a digital to analog conversion function, and an amplifier function. 21. The circuit as recited in claim 15, wherein at least two of said plurality of programmable digital circuit blocks are coupled in series to provide a digital system function.
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