Unified bus architecture for PoE communication and control
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-001/26
G06F-013/00
출원번호
US-0179476
(2008-07-24)
등록번호
US-8245056
(2012-08-14)
발명자
/ 주소
Diab, Wael William
출원인 / 주소
Broadcom Corporation
대리인 / 주소
Sterne, Kessler, Goldstein & Fox p.l.l.c.
인용정보
피인용 횟수 :
0인용 특허 :
18
초록▼
Embodiments of a unified communication and control bus architecture for Ethernet and/or PoE systems are provided. Embodiments enable a unified communication and control bus architecture that significantly simplifies communication and control in Ethernet and/or PoE systems. Embodiments enable signifi
Embodiments of a unified communication and control bus architecture for Ethernet and/or PoE systems are provided. Embodiments enable a unified communication and control bus architecture that significantly simplifies communication and control in Ethernet and/or PoE systems. Embodiments enable significant savings both in terms of cost and complexity as the number of communication and control buses is reduced down to one. Embodiments can be used in various Ethernet and/or PoE implementations, including, for example, single PCB-single PoE, single PCB-multiple PoE, chassis-based switch, and stackable-based switch configurations. Further, embodiments can be implemented using standard Ethernet as well as proprietary implementations.
대표청구항▼
1. A Power over Ethernet (PoE) system, comprising: a system controller;a plurality of data subsystems;a plurality of PoE subsystems, wherein each of the plurality of data subsystems is associated with a respective one of the plurality of PoE subsystems and is electrically isolated from said respecti
1. A Power over Ethernet (PoE) system, comprising: a system controller;a plurality of data subsystems;a plurality of PoE subsystems, wherein each of the plurality of data subsystems is associated with a respective one of the plurality of PoE subsystems and is electrically isolated from said respective one of the plurality of PoE subsystems; anda shared communication and control bus that couples said system controller to each of said data subsystems and PoE subsystems. 2. The PoE system of claim 1, wherein at least one of said data subsystems comprises one or more of a transceiver and Ethernet subsystems. 3. The PoE system of claim 1, wherein at least one of said PoE subsystems comprises one or more of a DC power supply and a Power Source Equipment (PSE) controller. 4. The PoE system of claim 1, wherein said system controller, data subsystems, and PoE subsystems are located on a single printed circuit board (PCB). 5. The PoE system of claim 1, wherein said system controller is located on a separate PCB than said data subsystems and PoE subsystems. 6. The PoE system of claim 1, wherein said system controller is located in a supervisory slot of a chassis-based switch, and wherein at least one of said data subsystems and an associated PoE subsystem are located in a respective linecard slot of said chassis-based switch. 7. The PoE system of claim 6, wherein said chassis-based switch is configurable. 8. The PoE system of claim 1, wherein said system controller is located in a supervisory slot of a stackables-based switch, and wherein at least one of said data subsystems and an associated PoE subsystem are located within a stackable unit of said stackables-based switch. 9. The PoE system of claim 1, wherein said shared communication and control bus uses any of the shielded twisting pair cabling standards. 10. The PoE system of claim 1, wherein said shared bus implements a shared access protocol. 11. The PoE system of claim 10, wherein said shared bus implements Carrier Sense Multiple Access/Collision Detection (CSMA/CD). 12. The PoE system of claim 10, wherein said shared bus implements a token-based shared access protocol. 13. The PoE system of claim 1, wherein said shared communication and control bus is a multi-drop bus, wherein each of said system controller, data subsystems, and PoE subsystems is attached to said bus through a respective tap point. 14. The PoE system of claim 1, wherein said shared communication and control bus is a multi-drop bus, and wherein at least one of said data subsystems and an associated PoE subsystem are attached to said bus through a single respective tap point. 15. The PoE system of claim 1, wherein said shared communication and control bus implements IEEE 802.3 (Ethernet). 16. The PoE system of claim 15, wherein said shared communication and control bus operates according to the half-duplex mode of operation of IEEE 802.3. 17. The PoE system of claim 15, wherein said shared communication and control bus implements one of 1000BASE-KX, 10 GBASE-KX4, and 10 GBASE-KR. 18. The PoE system of claim 1, further comprising: a plurality of bus controller subsystems that respectively couple said system controller, data subsystems, and PoE subsystems to said shared communication and control bus, wherein said bus controller subsystems enable bus access arbitration between said system controller, data subsystems, and PoE subsystems. 19. The PoE system of claim 18, wherein said bus controller subsystems include Ethernet controller subsystems. 20. The PoE system of claim 1, further comprising: a plurality of isolation interfaces, each associated with a corresponding one of said PoE subsystems and coupled between said corresponding one of said PoE subsystems and said shared communication and control bus. 21. The PoE system of claim 1, wherein said system controller is electrically isolated from said data subsystems and PoE subsystems. 22. The PoE system of claim 21, further comprising: one or more re-referencing circuits, coupled between said system controller and at least one of said data subsystems and an associated PoE subsystem. 23. The PoE system of claim 1, wherein said system controller is minimally or not electrically isolated from said data subsystems and electrically isolated from said PoE subsystems. 24. The PoE system of claim 1, wherein said shared communication and control bus consists of a single bus. 25. A combined data and power system, comprising: a system controller;a plurality of data subsystems;a plurality of power subsystems, wherein each of the plurality of data subsystems is associated with a respective one of the plurality of power subsystems and is electrically isolated from said respective one of the plurality of power subsystems; anda communication and control bus that singly couples said system controller to each of said data subsystems and power subsystems.
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이 특허에 인용된 특허 (18)
Bennett, Kendrick R.; Cafarella, John H.; Johnson, Peter G., Apparatus providing power-over-ethernet test instrument.
Simcoe Robert J. (Westborough MA) Thomas Robert E. (Hudson MA), Fast arbiter having easy scaling for large numbers of requesters, large numbers of resource types with multiple instance.
Blaha, Matthew; de la Torre, Luis; Quirk, Patrick J.; Saibi, Fadi, Isolated switched maintain power signature (MPS) and fault monitoring for power over Ethernet.
Yonge, III,Lawrence W.; Markwalter,Brian E.; Kostoff, II,Stanley J.; Patella,James Philip; Earnshaw,William E., Media access control protocol with priority and contention-free intervals.
Behrens Ulrich,DEX ; Kessler Michael Wolfgang,DEX ; Slater Robin-David,DEX ; Lounsbury Robert E. ; Kretschmann Robert J., Serial data isolator industrial control system providing intrinsically safe operation.
Cheng, Shelley, Transmitting data from a host computer in a reduced power state by an isolation block that disconnects the media access control layer from the physical layer.
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