$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Method and system for redundancy management of distributed and recoverable digital control system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-011/08
  • G06F-011/20
출원번호 US-0381652 (2006-05-04)
등록번호 US-8260492 (2012-09-04)
발명자 / 주소
  • Stange, Kent
  • Hess, Richard
  • Kelley, Gerald B
  • Rogers, Randy
출원인 / 주소
  • Honeywell International Inc.
대리인 / 주소
    Fogg & Powers LLC
인용정보 피인용 횟수 : 4  인용 특허 : 50

초록

A method and system for redundancy management is provided for a distributed and recoverable digital control system. The method uses unique redundancy management techniques to achieve recovery and restoration of redundant elements to full operation in an asynchronous environment. The system includes

대표청구항

1. A method for redundancy management comprising: providing a plurality of computing units each comprising: a plurality of redundant processing units for generating one or more redundant control commands; andone or more internal monitors for detecting one or more data errors in the control commands;

이 특허에 인용된 특허 (50)

  1. Davies,Ian Robert, Apparatus and method for a server deterministically killing a redundant server integrated within the same network storage appliance chassis.
  2. Long,Finbarr Denis; Ardini,Joseph; Kirkpatrick,Dana A.; O'Keeffe,Michael James, Apparatus and methods for fault-tolerant computing using a switching fabric.
  3. Reid Robert (Dunstable MA), Central processing apparatus for fault-tolerant computing.
  4. Slegel Timothy John ; Murray Robert E., Computer system with transparent processor sparing.
  5. Larry J. Yount, Critical control adaption of integrated modular architecture.
  6. LeCren,Andrew Thomas, Dynamic reallocation of processing resources for redundant functionality.
  7. Lorch,Jacob R.; Howell,Jonathan R.; Douceur,John R., Efficient changing of replica sets in distributed fault-tolerant computing system.
  8. Sampson Neil L. ; Gray Scott L. ; Walker Gary, Error detection and correction for data stored across multiple byte-wide memory devices.
  9. Marshall Joseph R. ; Langston Dale G., Error detection and fault isolation for lockstep processor systems.
  10. Marshall Joseph R. ; Langston Dale G., Error detection and fault isolation for lockstep processor systems.
  11. James Stevens Klecka ; William F. Bruckert ; Robert L. Jardine, Error self-checking and recovery using lock-step processor pair architecture.
  12. Hay Rick H. (Cave Creek AZ) Smith Clarence S. (Glendale AZ) Girts Robert D. (Mesa AZ) Yount Larry J. (Scottsdale AZ), Fail-operational fault tolerant flight critical computer architecture and monitoring method.
  13. Andress, Sidney L.; Andes, Curtis D.; Rightnour, Gerald E.; Smith, James R., Fast relief swapping of processors in a data processing system.
  14. Hess Richard F. (Glendale AZ) Yount Larry J. (Scottsdale AZ), Fault recoverable computer system.
  15. Hess Richard F. (Glendale AZ) Liebel Kurt A. (Phoenix AZ) Yount Larry J. (Phoenix AZ), Fault recovery mechanism, transparent to digital system function.
  16. Bissett Thomas D. ; Leveille Paul A. ; Muench Erik, Fault resilient/fault tolerant computing.
  17. Fuchs Stephen ; Wardrop Andrew J., Fault tolerant computer system.
  18. Wardrop Andrew J., Fault tolerant computer system.
  19. Frank M. G. Doerenberg ; Michael Topic, Fault tolerant data communication network.
  20. Gray Scott L. (Glendale AZ) Thompson Steven R. (Phoenix AZ), Fault-tolerant digital computing system with reduced memory redundancy.
  21. Quach, Nhon, Firmware mechanism for correcting soft errors.
  22. Hess, Richard, High integrity control system architecture using digital computing platforms with rapid recovery.
  23. Hess Richard F. (Scottsdale AZ), High integrity digital processor architecture.
  24. LeCrone, Douglas; Pocock, Bruce A., Host system for mass storage business continuance volumes.
  25. LeCrone,Douglas; Pocock,Bruce A., Host system for mass storage business continuance volumes.
  26. Fuchs Wesley K. (Mahomet IL) Huang Yennun (Bridgewater NJ) Wang Yi-Min (Berkeley Heights NJ), Input sequence reordering method for software failure recovery.
  27. Loise, Dominique; Ledoux, Jean-Pierre; Sardier, Patrick, Low cost modular architecture for piloting an aerodyne operating with high level of security.
  28. Heath David M. (Nashua NH) Kraley Michael F. (Lexington MA) Pant Sangam (Winchester MA), Management facility for server entry and application utilization in a multi-node server configuration.
  29. Hess Richard F. ; Smith Clarence Scott, Memory with high integrity memory cells.
  30. Hofstee, Harm Peter; Nair, Ravi, Method and apparatus for computer system reliability.
  31. Murphy Declan J. ; Talluri Madhusudhan ; Matena Vladimir ; Khalidi Yousef A. ; Bernabeu-Auban Jose M.,ESX ; Tucker Andrew G., Method and apparatus for transparent server failover for highly available objects.
  32. Bossen Douglas Craig ; Chandra Arun, Method and system for fault-handling to improve reliability of a data-processing system.
  33. Shinohara,Tomohiro; Furuya,Hodaka; Sunada,Yoji, Method and system for installing program in multiple system.
  34. Chrabaszcz Michael, Method for clustering software applications.
  35. Spaur Charles W. ; Braitberg Michael F. ; Kennedy Patrick J. ; Hatcher Lester B., Mobile portable wireless communication system.
  36. Dhong, Sang Hoo; Hofstee, Harm Peter; Nair, Ravi; Posluszny, Steven Douglas, Multiprocessor with pair-wise high reliability mode, and method therefore.
  37. Winger, John M.; Green, David; Ohran, Richard S.; Ohran, Michael R., Operation of a standby server to preserve data stored by a network server.
  38. De Bonis-Hamelin, Marie-Antoinette; Menyhart, Zoltan; Sorace, Jean-Dominique, Process for reconfiguring an information processing system upon detection of a component failure.
  39. Fuchs Wesley K. (Mahomet IL) Huang Yennun (Bridgewater NJ) Wang Yi-Min (Berkeley Heights NJ), Progressive retry method and apparatus for software failure recovery in multi-process message-passing applications.
  40. Fuchs Wesley K. (Mahomet IL) Huang Yennun (Bridgewater NJ) Kintala Chandra M. (Warren NJ) Wang Yi-Min (Berkeley Heights NJ), Progressive retry method and apparatus having reusable software modules for software failure recovery in multi-process m.
  41. Greenwood Thomas A. ; Pastusak Thomas W., Real-time orientation of machine media to improve machine accuracy.
  42. Thuy Pham D. (Chatenay Malabry FRX), Self-monitored process control device.
  43. Jin Lei ; Kaplan David L. ; Krishnan Murali R., Server architecture with detection and recovery of failed out-of-process application.
  44. Jin, Lei; Kaplan, David L.; Krishnan, Murali R., Server architecture with detection and recovery of failed out-of-process application.
  45. Pittelkow,Michael Henry; Olson,Mark David, System and method for a reserved memory area shared by all redundant storage controllers.
  46. Moiin, Hossein; Dickinson, Peter Martin Grant, System and method of monitoring a distributed fault tolerant computer system.
  47. Gawali,Ashish L., System and method to automate replication in a clustered environment.
  48. Fung,Priscilla C.; Somogyi,Alexander J., System for highly available transaction recovery for transaction processing systems.
  49. Slegel Timothy John ; Murray Robert E., Transparent processor sparing.
  50. Minto Karl Dean, Triplex control system with sensor failure compensation.

이 특허를 인용한 특허 (4)

  1. Butcher, Glenn Gerard, Dynamic redundancy management.
  2. Howe, Benjamin M.; Sanders, Jacob L., Fast transitions for massively parallel computing applications.
  3. Costes, Regis; De Verbigier, Laurence; Begout, Frank; Andrieu, Laurent, Monitoring of a flight control actuator of an aircraft.
  4. Howe, Benjamin M, System and method for input data fault recovery in a massively parallel real time computing system.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로