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Electromigration immune through-substrate vias 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/40
출원번호 US-0702463 (2010-02-09)
등록번호 US-8304863 (2012-11-06)
발명자 / 주소
  • Filippi, Ronald G.
  • Fitzsimmons, John A.
  • Kolvenbach, Kevin
  • Wang, Ping-Chuan
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Scully, Scott, Murphy & Presser, P.C.
인용정보 피인용 횟수 : 13  인용 특허 : 67

초록

A through-substrate via (TSV) structure includes at least two electrically conductive via segments embedded in a substrate and separated from each other by an electrically conductive barrier layer therebetween. The length of each individual conductive via segment is typically equal to, or less than,

대표청구항

1. A semiconductor structure comprising: a first substrate, said first substrate including at least one through-substrate via (TSV) structure extending from a first surface located on one side of said first substrate to a second surface located on an opposite side of said first substrate, each of sa

이 특허에 인용된 특허 (67)

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이 특허를 인용한 특허 (13)

  1. Edelstein, Daniel C; Yang, Chih-Chao, Advanced through substrate via metallization in three dimensional semiconductor integration.
  2. Filippi, Ronald G.; Fitzsimmons, John A.; Kolvenbach, Kevin; Wang, Ping-Chuan, Electromigration immune through-substrate vias.
  3. Chen, Fen; Farooq, Mukta G.; Griesemer, John A.; Kothandaraman, Chandrasekaran; Safran, John M.; Sullivan, Timothy D.; Wang, Ping-Chuan; Zhang, Lijuan, Electromigration monitor.
  4. Banijamali, Bahareh, Elliptical through silicon vias for active interposers.
  5. Kim, Su-kyoung; Choi, Gil-heyun; Park, Byung-lyul; Moon, Kwang-jin; Park, Kun-sang; Lim, Dong-chan; Lee, Do-sun, Integrated circuit device including through-silicon via structure having offset interface.
  6. Chen, Fen; Kim, Andrew T.; Lu, Minhua; Sullivan, Timothy D.; Wang, Ping-Chuan; Zhang, Lijuan, Integrated circuit structure with metal cap and methods of fabrication.
  7. Chen, Fen; Lu, Minhua; Sullivan, Timothy D.; Wang, Ping-Chuan; Zhang, Lijuan, Integrated circuit structure with through-semiconductor via.
  8. Lo, Hsiao Yun; Lin, Yung-Chi; Hsueh, Yang-Chih; Wu, Tsang-Jiuh; Chiou, Wen-Chih, Interconnection structure with confinement layer.
  9. Fang, Wei-leun; Lin, Chia Han; Lee, Feng Yu, Method for fabricating interconnecting lines inside via holes of semiconductor device.
  10. Lin, Yung-Chi; Wu, Tsang-Jiuh; Chiou, Wen-Chih, Robust through-silicon-via structure.
  11. Moon, Kwangjin; Kang, SungHee; Kim, Taeseong; Park, Byung Lyul; Park, Yeun-Sang; Bang, Sukchul, Semiconductor devices and methods of fabricating the same.
  12. Moon, Kwangjin; Kang, SungHee; Kim, Taeseong; Park, Byung Lyul; Park, Yeun-Sang; Bang, Sukchul, Semiconductor devices and methods of fabricating the same.
  13. Filippi, Ronald G.; Kaltalioglu, Erdem; Siddiqui, Shahab; Wang, Ping-Chuan; Zhang, Lijuan, TSV deep trench capacitor and anti-fuse structure.
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