Circuit design information generating equipment, function execution system, and memory medium storing program
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-017/50
G06F-013/36
G06F-009/26
출원번호
US-0725908
(2010-03-17)
등록번호
US-8359564
(2013-01-22)
우선권정보
JP-2009-170480 (2009-07-21)
발명자
/ 주소
Yamada, Kazuo
출원인 / 주소
Fuji Xerox Co., Ltd.
인용정보
피인용 횟수 :
0인용 특허 :
21
초록▼
A design information generating equipment is provided. A control component of the design information generating equipment, when a basic function of the plurality of functions constitutes a requested function, and design information that corresponds to the basic function is stored in a second memory
A design information generating equipment is provided. A control component of the design information generating equipment, when a basic function of the plurality of functions constitutes a requested function, and design information that corresponds to the basic function is stored in a second memory area, uses the stored design information, and, when the design information that corresponds to the basic function of the plurality of functions is not stored in the second memory area, uses a source program corresponding to the basic function of the plurality of functions stored in a first memory area, and performs control so as to generate design information corresponding to the basic function of the plurality of functions and stores the generated design information in the second memory area, and, using the generated design information, reconfigures a design configured to execute the requested function, and executes the requested function with the reconfigurable design information.
대표청구항▼
1. A circuit design information generating equipment, comprising: a first memory area that stores a source program which corresponds to at least one basic function of a plurality of functions;a second memory area that associates circuit design information used to reconfigure a circuit with the basic
1. A circuit design information generating equipment, comprising: a first memory area that stores a source program which corresponds to at least one basic function of a plurality of functions;a second memory area that associates circuit design information used to reconfigure a circuit with the basic function and stores circuit design information; anda control component that, when the basic function constitutes a requested function, and the circuit design information that corresponds to the basic function is stored in the second memory area, reconfigures the circuit using the stored circuit design information, andwhen the circuit design information that corresponds to the basic function is not stored in the second memory area, generates circuit design information corresponding to the basic function using the source program corresponding to the basic function stored in the first memory area,stores the generated circuit design information in the second memory area,reconfigures the circuit configured to execute the requested function using the generated circuit design information, andexecutes the requested function with the reconfigurable circuit. 2. A function execution system, comprising: the circuit design information generating equipment of claim 1; anda function executing apparatus that includes the circuit, which is reconfigurable using the circuit design information, and that executes the requested function. 3. The function execution system of claim 2 further comprising: a second function executing apparatus that comprises a computer configured to execute a program obtained by converting the source program into an executable format, whereinthe control component controls such that the requested function is not executed by the function executing apparatus, and the requested function is instead executed by the second function executing apparatus using the program obtained by converting the source program stored in the first memory area into the executable format, when information indicating a state of a load of the second function executing apparatus is acquired in the circuit design information generating equipment and the acquired information indicating the state of the load meets a predetermined condition. 4. A circuit design information generating equipment, comprising: a first memory area that stores a source program which corresponds to at least one basic function of a plurality of functions;a second memory area that associates circuit design information used to reconfigure a circuit with the basic function and stores circuit design information; anda control component that executes a requested function by a first control and a second control, such that, when the basic function constitutes a requested function, and is set as a specified basic function to be executed using a program obtained by converting the source program stored in the first memory area to an executable format according to a predetermined condition related to execution of the requested function, the first control is performed so as to execute the specified basic function using the program obtained by converting the source program into the executable format,when the basic function is not set as the specified basic function and the corresponding circuit design information is stored in the second memory area, the second control is performed so as to execute a function which is not the specified function using the stored circuit design information, andwhen the basic function is not set as the specified basic function and the corresponding circuit design information is not stored in the second memory area, the second control is performed so as to generate circuit design information corresponding to the basic function using the source program which is stored in the first memory area and which corresponds to the basic function,store the generated circuit design information in the second memory area,reconfigure a circuit configured to execute the basic function using the generated circuit design information, andexecute a function which is not the specified function using the reconfigurable circuit. 5. A function execution system, comprising: the circuit design information generating equipment of claim 4; anda function executing apparatus that includes the circuit, which is reconfigurable using the circuit design information, and a computer configured to execute the program obtained by converting the source program into the executable format, and executes the requested function using the circuit. 6. The function execution system of claim 5 further comprising: a second function executing apparatus that comprises a computer configured to execute the program obtained by converting the source program into the executable format, whereinthe control component controls such that the requested function is not executed by the function executing apparatus, and the requested function is instead executed by the second function executing apparatus using the program obtained by converting the source program stored in the first memory area into the executable format, when information indicating a state of a load of the second function executing apparatus is acquired in the circuit design information generating equipment and the acquired information indicating the state of the load meets a predetermined condition. 7. A non-transitory computer-readable medium storing a program, which when executed by a computer that is connected to a first memory area that stores a source program corresponding to at least one basic function of a plurality of functions and a second memory area that associates circuit design information used to reconfigure a circuit with the basic function and stores the circuit design information, causes the computer to perform a process comprising: when the basic function constitutes a requested function, and circuit design information that corresponds to the basic function is stored in the second memory area, reconfiguring the circuit using the stored circuit design information; andwhen the circuit design information that corresponds to the basic function is not stored in the second memory area, generating circuit design information corresponding to the basic function using the source program corresponding to the basic function stored in the first memory area,storing the generated circuit design information in the second memory area,reconfiguring a circuit configured to execute the requested function, using the generated circuit design information stored in the second memory area, andexecuting the requested function with the reconfigurable circuit. 8. A non-transitory computer-readable medium storing a program, which when executed by a computer that is connected to a first memory area that stores a source program corresponding to at least one basic function of a plurality of basic functions and a second memory area that associates circuit design information used to reconfigure a circuit with the basic function and stores the circuit design information, causes the computer to perform a process comprising: when the basic function constitutes a requested function, and is set as a specified basic function to be executed using a program obtained by converting the source program stored in the first memory area to an executable format according to a predetermined condition related to execution of the requested function, executing the specified basic function using the program obtained by converting the source program into the executable format:when the basic function is not set as the specified basic function and the corresponding circuit design information is stored in the second memory area, reconfiguring the circuit using the stored circuit design information; andwhen the basic function is not set as the specified basic function and the corresponding circuit design information is not stored in the second memory area, generating circuit design information using the source program which is stored in the first memory area and which corresponds to the basic function,storing the generated circuit design information in the second memory area,reconfiguring a circuit configured to execute the basic function using the generated circuit design information, andexecuting a function which is not the specified function using the reconfigurable circuit.
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