IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0560093
(2009-09-15)
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등록번호 |
US-8364250
(2013-01-29)
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발명자
/ 주소 |
- Moon, Jim
- Visser, Henk
- Hunt, Robert
- Dhillon, Marshal
- McCombie, Devin
- Banet, Matt
|
출원인 / 주소 |
|
인용정보 |
피인용 횟수 :
33 인용 특허 :
137 |
초록
▼
The invention provides a body-worn monitor featuring a processing system that receives a digital data stream from an ECG system. A cable houses the ECG system at one terminal end, and plugs into the processing system, which is worn on the patient's wrist like a conventional wristwatch. The ECG syste
The invention provides a body-worn monitor featuring a processing system that receives a digital data stream from an ECG system. A cable houses the ECG system at one terminal end, and plugs into the processing system, which is worn on the patient's wrist like a conventional wristwatch. The ECG system features: i) a connecting portion connected to multiple electrodes worn by the patient; ii) a differential amplifier that receives electrical signals from each electrode and process them to generate an analog ECG waveform; iii) an analog-to-digital converter that converts the analog ECG waveform into a digital ECG waveform; and iv) a transceiver that transmits a digital data stream representing the digital ECG waveform (or information calculated from the waveform) through the cable and to the processing system. Different ECG systems, typically featuring three, five, or twelve electrodes, can be interchanged with one another.
대표청구항
▼
1. A system for monitoring a patient, comprising: a processing system configured to be worn on a patient's body comprising a first Controller Area Network (“CAN”) transceiver configured to communicate with external systems for monitoring signals from the patient, and a first microprocessor in electr
1. A system for monitoring a patient, comprising: a processing system configured to be worn on a patient's body comprising a first Controller Area Network (“CAN”) transceiver configured to communicate with external systems for monitoring signals from the patient, and a first microprocessor in electrical communication with the first CAN transceiver and configured to receive and process the signals from the patient;an external ECG system comprising a second CAN transceiver and a second microprocessor configured to communicate and synchronize with the processing system, the ECG system configured to generate and transmit a digital ECG data stream representing a digital ECG waveform or values calculated therefrom to the processing system;an external oscillometric system comprising a third CAN transceiver and a third microprocessor configured to communicate and synchronize with the processing system, the oscillometric system configured to generate and transmit a digital oscillometric data stream representing a digital oscillometric waveform or values calculated therefrom to the processing system; andan external accelerometer system configured to generate and transmit a digital accelerometer data stream representing a digital accelerometer waveform or values calculated therefrom to the processing system. 2. The system of claim 1, wherein the processing system is in communication with both the second microprocessor comprised by the ECG system and the third microprocessor comprised by the oscillometry system. 3. The system of claim 2, wherein the first microprocessor comprised by the processing system is configured to send a packet to the second microprocessor comprised by the ECG system to synchronize the first and second microprocessors. 4. The system of claim 3, wherein the second microprocessor comprised by the ECG system is configured to adjust a timing parameter in response to the packet. 5. The system of claim 4, wherein the ECG system is configured to transmit a packet to the processing system indicating the timing parameter. 6. The system of claim 2, wherein the first microprocessor comprised by the processing system is configured to send a packet to the third microprocessor comprised by the oscillometry system to synchronize the first and third microprocessors. 7. The system of claim 6, wherein the third microprocessor comprised by the oscillometry system is configured to adjust a timing parameter in response to the packet. 8. The system of claim 7, wherein the oscillometry system is configured to transmit a packet to the processing system indicating the timing parameter. 9. The system of claim 1, wherein the ECG system further comprises a housing enclosing the ECG system, wherein said housing further encloses the external accelerometer system. 10. The system of claim 1, wherein a cable configured to connect the processing system and at least one of the ECG system and oscillometry system comprises the external accelerometer system attached thereto. 11. The system of claim 1, wherein the external accelerometer system comprises a first accelerometer configured as a component of the ECG system, and a second accelerometer configured as a component of a cable connecting the processing system and at least one of the ECG system and oscillometry system. 12. The system of claim 1, wherein the processing system connects to the ECG system with a first cable configured to transmit serial data, and to the oscillometry system with a second cable configured to transmit serial data. 13. The system of claim 12, wherein the first cable comprises no more than 5 conductors. 14. The system of claim 12, wherein the second cable comprises no more than 5 conductors. 15. The system of claim 12, wherein the first cable is terminated with a first connector, and the processing system comprises a first input port comprising a group of conductors configured to match conductors in the first cable, the first input port configured so that the first connector can be inserted into and detached therefrom. 16. The system of claim 12, wherein the second cable is terminated with a second connector, and the processing system comprises a second input port comprising a group of conductors configured to match conductors in the second cable, the second input port configured so that the second connector can be inserted into and detached therefrom. 17. The system of claim 12, wherein the first cable is terminated with a first connector, and the processing system comprises a first input port comprising a first group of conductors configured to match conductors in the first cable, the first input port configured so that the first connector can be inserted into and detached therefrom, and the second cable is terminated with a second connector, and the processing system comprises a second input port comprising a second group of conductors configured to match conductors in the second cable, the second input port configured so that the second connector can be inserted into and detached therefrom, wherein the first input port is additionally configured to receive the second connector, and the second input port is additionally configured to receive the first connector.
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