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A method of developing an application for deployment on a computing system. The computing system includes a processor and a reconfigurable logic in communication with the processor for configuration thereby. The method includes programming the processor with hardware-neutral instructions in a high-l

A method of developing an application for deployment on a computing system. The computing system includes a processor and a reconfigurable logic in communication with the processor for configuration thereby. The method includes programming the processor with hardware-neutral instructions in a high-level software programming language. The instructions are representative of an application configured to execute at least partially on the reconfigurable logic. The method further includes instantiating elements from a library of elements compatible with the high-level programming language; and constructing programmatically a generic data graph representative of the application to be mapped at least partially onto the reconfigurable logic. The generic data graph is expressed as streams of records flowing between operators. A computing system is also disclosed. By presenting an instruction level streaming data processing model that expresses an application as operators and data flows, the invention provide several advantages such as design portability.

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1. A method of developing, without need for synthesis, an application for deployment on a computing system, the computing system comprising a processor and a reconfigurable logic in communication with the processor for configuration thereby, the method comprising: programming the processor with hard

1. A method of developing, without need for synthesis, an application for deployment on a computing system, the computing system comprising a processor and a reconfigurable logic in communication with the processor for configuration thereby, the method comprising: programming the processor with hardware-neutral instructions in a high-level software programming language, the instructions representative of an application configured to execute at least partially on the reconfigurable logic;instantiating elements required for the application from a library of elements compatible with the high-level programming language; andconstructing programmatically a generic data graph representative of the application to be mapped at least partially onto the reconfigurable logic, the generic data graph being expressed as streams of records flowing between operators. 2. The method of developing an application for deployment on a computing system according to claim 1 further comprising mapping the generic data graph to the reconfigurable logic. 3. The method of developing an application for deployment on a computing system according to claim 1, wherein the reconfigurable logic comprises reconfigurable logic blocks arranged in an array, the method further comprising: selecting a configuration file to load to the reconfigurable logic array based on resources required to implement a generic data path, thereby configuring the reconfigurable logic array; andselecting an operation for each of the reconfigurable logic blocks and determining routing information for data therebetween,thereby configuring the reconfigurable logic blocks. 4. The method of developing an application for deployment on a computing system according to claim 1, wherein the generic data graph is constructed programmatically with operator overloading. 5. The method of developing an application for deployment on a computing system according to claim 1, wherein the generic data graph is constructed programmatically with library functions. 6. The method of developing an application for deployment on a computing system according to claim 1 further comprising generating a machine-executable code in response to the programmed instructions and the instantiated library elements. 7. The method of developing an application for deployment on a computing system according to claim 1, wherein the application is configured to execute partially on the reconfigurable logic and partially on the processor. 8. The method of developing an application for deployment on a computing system according to claim 1, wherein the application is configured to execute on the reconfigurable logic. 9. A computing system, comprising: a processor;a reconfigurable logic in communication with the processor for configuration thereby without need for synthesis; andmachine-executable instructions representative of an application, the application configured to execute at least partially on the reconfigurable logic, at least the portion of the application configured to execute on the reconfigurable logic being represented by a generic data graph constructed from a high-level programming language, the generic data graph being expressed as streams of records flowing between operators;wherein the processor configures the reconfigurable logic based at least in part on the machine-executable instructions and the generic data graph. 10. The computing system according to claim 9, wherein once the reconfigurable logic is configured by the processor, the application configured to execute at least partially on the reconfigurable logic is executed independently of the processor. 11. The computing system according to claim 10, wherein the application configured to execute at least partially on the reconfigurable logic is executed independently of instruction scheduling. 12. The computing system according to claim 10, wherein the application configured to execute at least partially on the reconfigurable logic is executed without explicit data movement instructions. 13. The computing system according to claim 9, wherein the reconfigurable logic comprises reconfigurable logic blocks arranged in an array, and wherein the processor configures the reconfigurable logic array by: selecting a configuration file to load to the reconfigurable logic array based on resources required to implement a generic data path, thereby configuring the reconfigurable logic array; andselecting an operation for each of the reconfigurable logic blocks and determining routing information for data therebetween,thereby configuring the reconfigurable logic blocks. 14. The computing system according to claim 9, wherein the generic data graph is constructed programmatically with operator overloading. 15. The computing system according to claim 9, wherein the generic data graph is constructed programmatically with library functions. 16. The computing system according to claim 9, wherein the application is configured to execute partially on the reconfigurable logic and partially on the processor. 17. The computing system according to claim 9, wherein the application is configured to execute on the reconfigurable logic.