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Systems and methods for profiling an application running on a parallel-processing computer system

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-009/44
출원번호 US-0716508 (2007-03-09)
등록번호 US-8375368 (2013-02-12)
발명자 / 주소
  • Tuck, Nathan D.
  • Papakipos, Matthew N.
  • Grant, Brian K.
  • Demetriou, Christopher G.
  • Civlin, Jan
출원인 / 주소
  • Google Inc.
인용정보 피인용 횟수 : 27  인용 특허 : 43

초록

A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of the parallel-processing computer systems to accelerate/optimize numeric and arra

대표청구항

1. A computer-implemented method, comprising: in a runtime system configured to run on a parallel-processing computer system that includes one or more first and second processing elements and memory storing one or more programs for execution by the one or more first and second processing elements, r

이 특허에 인용된 특허 (43)

  1. Wu, Gansha; Lueh, Guei Yuan; Shi, Xiaohua, Apparatus and methods for restoring synchronization to object-oriented software applications in managed runtime environments.
  2. Gyugyi, Paul J.; Danilak, Radoslav, Apparatus, system, and method for offloading pattern matching scanning.
  3. Shaylor, Nicholas, Code generation for a bytecode compiler.
  4. Morshed, Farokh; Meagher, Robert, Collection of timing and coverage data through a debugging interface.
  5. Col, Gerard M.; Henry, G. Glenn; Hooker, Rodney E., Compare branch instruction pairing within a single integer pipeline.
  6. Radigan, James J., Compiling for multiple virtual machines targeting different processor architectures.
  7. Ihara Sigeo (Tokorozawa JPX) Tanaka Teruo (Hachioji JPX) Iwasawa Kyoko (Tokyo JPX) Hamanaka Naoki (Tokyo JPX), Compiling method for determining programs to be executed parallelly by respective processors in a parallel computer whic.
  8. Tang Jun ; So John Ling Wing, Computer operating process allocating tasks between first and second processors at run time based upon current processor load.
  9. Yoav Lavi IL; Amnon Rom IL; Robert Knuth DE; Rivka Blum IL; Meny Yanni IL; Haim Granot IL; Anat Hershko IL; Georgiy Shenderovitch IL; Elliot Cohen IL; Eran Weingatren IL, Configurable long instruction word architecture and instruction set.
  10. Orelind, Greger J.; Jaenicke, August A., Correlation-based information extraction from markup language documents.
  11. King Michael Roy,ATX, Data processing system having monitoring of software activity.
  12. Held James P., Debugger for debugging tasks in an operating system virtual device driver.
  13. Cary Lee Bates ; Jeffrey Michael Ryan, Debugger thread identification points.
  14. Creamer,Thomas E.; Hilf,Bill H.; Katz,Neil A.; Moore,Victor S., Debugging a grid environment using ghost agents.
  15. Ankireddipally, Lakshmi Narasimha; Yeh, Ryh-Wei; Nichols, Dan; Devesetti, Ravi, Distributed transaction processing system.
  16. Gebhart, Alexander, Grid compute node software application deployment.
  17. Miller, Robert; Morey, Vicki Lynn; Thayib, Kiswanto; Williams, Laurie Ann, Merge protocol for clustered computer system.
  18. Choi, Jong-Deok, Method and apparatus for deterministic replay of java multithreaded programs on multiprocessors.
  19. Ebcioglu Mahmut Kemal ; Groves Randall Dean, Method and apparatus for dynamic conversion of computer instructions.
  20. Burke, David, Method and apparatus for executing standard functions in a computer system using a field programmable gate array.
  21. Wolczko Mario I. ; Ungar David M., Method and apparatus for improving compiler performance during subsequent compilations of a source program.
  22. Kielstra,Allan Henry; Stepanian,Levon Sassoon; Stoodley,Kevin Alexander, Method and apparatus for transforming Java Native Interface function calls into simpler operations during just-in-time compilation.
  23. Maloney,Rian R., Method and system for online communication between a check sorter and a check processing system.
  24. Itou Yoshihiro,JPX ; Nakajima Kei,JPX, Method of reducing unnecessary barrier instructions.
  25. Rangachari,Achutha Raman, Methods and apparatus for executing instructions in parallel.
  26. Strom,Daniel J.; Zeliger,Ohad, Methods and apparatus providing remote operation of an application programming interface.
  27. Blaner Bartholomew (Underhill Center VT) Larsen Larry D. (Raleigh NC), Multiple condition code branching system in a multi-processor environment.
  28. Bell, Colin; Branscomb, Brian, Network device with a distributed switch fabric timing system.
  29. Gupta Rajiv ; Worley ; Jr. William S., Out-of-order execution using encoded dependencies between instructions in queues to determine stall values that control.
  30. Aguilar, Jr., Maximino; Nutter, Mark Richard; Stafford, James Michael, Processor dedicated code handling in a multi-processor environment.
  31. Souloglou,Jason; Rawsthorne,Alasdair, Program code conversion.
  32. Wright, Gregory M.; Wolczko, Mario I.; Seidl, Matthew L., Reducing the overhead involved in executing native code in a virtual machine through binary reoptimization.
  33. Barbour Anthony L. ; Blaho Bruce E., Runtime processor detection and installation of highly tuned processor specific routines.
  34. Hon Keat W. Chan ; Andrew J. Edwards ; Amitabh Srivastava ; Hoi H. Vo, Shared library optimization for heterogeneous programs.
  35. Spix George A. (Eau Claire WI) Wengelski Diane M. (Eau Claire WI) Hawkinson Stuart W. (Eau Claire WI) Johnson Mark D. (Eau Claire WI) Burke Jeremiah D. (Eau Claire WI) Thompson Keith J. (Eau Claire W, System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel executi.
  36. Craig Chambers ; Susan J. Eggers ; Brian K. Grant ; Markus Mock ; Matthai Philipose, System and method for performing selective dynamic compilation using run-time information.
  37. Bordes, Jean Pierre; Davis, Curtis; Hegde, Manju, System with PPU/GPU architecture.
  38. Demetriou, Christopher G.; Papakipos, Matthew N.; Gibbs, Noah L., Systems and methods for debugging an application running on a parallel-processing computer system.
  39. Crutchfield, William Y.; Grant, Brian K.; Papakipos, Matthew N., Systems and methods for dynamically choosing a processing element for a compute kernel.
  40. Wilt, Nicholas P.; Miller, James, Systems and methods for managing drivers in a computing system.
  41. Wannamaker, Jeffrey; Scheyen, Peter G. N., Targeted runtime compilation.
  42. Ankireddipally, Lakshmi Narasimha; Yeh, Ryh-Wei; Nichols, Dan; Devesetti, Ravi, Transaction data structure for process communications among network-distributed applications.
  43. Pharies,Stefan H.; Srinivasan,Sowmy K.; Jethanandani,Natasha H.; Christensen,Yann Erik; Kharitidi,Elena A.; Purdy,Douglas M., Type bridges.

이 특허를 인용한 특허 (27)

  1. Roovers, Wik, Code profiling in embedded ULE applications.
  2. Grover, Vinod; Lutz, Thibaut, Dynamic compiler parallelism techniques.
  3. Song, Cheng-Chung, Framework for a software error inject tool.
  4. Song, Cheng-Chung, Framework for a software error inject tool.
  5. Song, Cheng-Chung, Framework for a software error inject tool.
  6. Song, Cheng-Chung, Framework for a software error inject tool.
  7. Venkataraman, Vyas, Grouping and analysis of data access hazard reports.
  8. Aggag, Khalid; Narayanan, Suriya, Incrementally compiling software artifacts from an interactive development environment.
  9. Mola, Jordi; Baeza, Juan Carlos Arevalo, Indexing a trace by insertion of key frames for replay responsiveness.
  10. Mola, Jordi; Baeza, Juan Carlos Arevalo, Indexing a trace by insertion of key frames for replay responsiveness.
  11. Mola, Jordi, Indexing a trace by insertion of memory snapshots for replay responsiveness.
  12. Giefers, Heiner; Polig, Raphael, Interposer for dynamic mapping of API calls.
  13. Glick, Adam, Method and apparatus for accelerating load-point scanning.
  14. Marathe, Jaydeep, Method and apparatus for compiler processing for a function marked with multiple execution spaces.
  15. Johnson, Stephen P., Method and apparatus for efficient use of graphics processing resources in a virtualized execution enviornment.
  16. Marathe, Jaydeep; Murphy, Michael; Lee, Sean Y., Method and system for multiple embedded device links in a host executable.
  17. Murphy, Michael; Lee, Sean Y.; Jones, Stephen; Bharambe, Girish; Marathe, Jaydeep, Method and system for separate compilation of device code embedded in host code.
  18. Puzovic, Milos, Methods and systems for analyzing and improving performance of computer codes.
  19. Guthrie, Guy L; Heisch, Randall R; Indukuru, Venkat R; Sawdey, Aaron C, Monitoring software performance.
  20. Mola, Jordi; Sykes, Kenneth Walter, Querying an indexed time-travel trace.
  21. Mola, Jordi; Sykes, Kenneth Walter, Resource lifetime analysis using a time-travel trace.
  22. Jain, Nitisha; Murali, Prakash, Sampling technique to adjust application sampling rate.
  23. Mola, Jordi, Searching an indexed time-travel trace.
  24. Perelygin, Kyrylo; Kini, Vivek; Venkataraman, Vyas, Selectively killing trapped multi-process service clients sharing the same hardware context.
  25. Grover, Vinod; Marathe, Jaydeep; Lee, Sean, System and method for compiler support for kernel launches in device code.
  26. Fliess, Alon Mordechai; Fliess, Erez; Reuben, Joshua; Etchin, Aaron, System and method of cost oriented software profiling.
  27. Bienkowski, Joseph R.; Knelleken, Martin; Hinkle, Benjamin V.; Erickson, Michelle D.; MacDonald, Jared D.; Wey, Claudia G., User interface driven real-time performance evaluation of program code.
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