IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
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출원번호 |
US-0894087
(2010-09-29)
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등록번호 |
US-8391049
(2013-03-05)
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발명자
/ 주소 |
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출원인 / 주소 |
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인용정보 |
피인용 횟수 :
10 인용 특허 :
86 |
초록
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A non-volatile resistive switching memory device. The device includes a first electrode, a second electrode, a switching material in direct contact with a metal region of the second electrode, and a resistive material disposed between the second electrode and the switching material. The resistive ma
A non-volatile resistive switching memory device. The device includes a first electrode, a second electrode, a switching material in direct contact with a metal region of the second electrode, and a resistive material disposed between the second electrode and the switching material. The resistive material has an ohmic characteristic and a resistance substantially the same as an on state resistance of the switching device. The resistive material allows for a change in a resistance of the switching material upon application of voltage pulse without time delay and free of a reverse bias after the voltage pulse. The first voltage pulse causes a programming current to flow from the second electrode to the first electrode. The resistive material further causes the programming current to be no greater than a predetermined value.
대표청구항
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1. A method for programming a non-volatile resistive switching memory device, comprising: providing a switching device, the switching device comprising a first electrode, a switching material overlying the first electrode, a second electrode comprising at least a metal material overlying the switchi
1. A method for programming a non-volatile resistive switching memory device, comprising: providing a switching device, the switching device comprising a first electrode, a switching material overlying the first electrode, a second electrode comprising at least a metal material overlying the switching material and a resistive material disposed between the first electrode and the switching material, the resistive material having an ohmic characteristic and being characterized by a resistance substantially the same as an on state resistance of the switching device; andapplying a first voltage pulse to the switching device to cause a change of state of the switching device from a first state to a second state, the change of state being free from a time delay associated with an RC constant from a resistive element and being free from a parasitic capacitance coupled to the switching device. 2. The method of claim 1 wherein the first state is a first resistance of the switching material and the second state is a second resistance of the switching material. 3. The method of claim 1 wherein resistive material is configured to cause a programming current to be no greater than a predetermined value to flow in the switching device upon application of the first voltage pulse. 4. The method of claim 1 wherein the resistive switching device is further free from a reverse bias associated with the parasitic capacitance after the first voltage pulse, the reverse bias causes an undesirable erase cycle to the switching device. 5. The method of claim 1 wherein the resistive element is a resistor device or a transistor device. 6. The method of claim 1 wherein the on state is a low resistance state. 7. The method of claim 1 wherein the first electrode is spatially orthogonal to the second electrode. 8. The method of claim 1 wherein the resistive switching device is disposed in an interconnected crossbar array. 9. The method of claim 1 wherein the resistive switching device is free from an external circuitry for current control in a bit line or a word line to control the programming current. 10. The method of claim 9 wherein the external circuitry causes a parasitic capacitance and a parasitic RC (resistance-capacitance) time delay during programming (Read, Write, or Erase). 11. The method of claim 9 wherein the external resistor circuitry causes a reverse bias after programming and causes an undesirable erase cycle. 12. The method of claim 1 wherein the resistive material maintains the resistance upon application of the first voltage pulse. 13. The method of claim 1 wherein the resistive material is disposed between the second electrode and the switching region. 14. The method of claim 1 wherein the first electrode and the second electrode comprises at least copper, tungsten, or aluminum, the metal material comprises silver, gold, platinum, palladium, aluminum, nickel or aluminum, the switching material comprises at least an amorphous silicon material, and the resistive material comprises a dielectric material. 15. The method of claim 14 wherein the metal material forms a metal region in a portion of the switching material upon application of a positive voltage greater than a first threshold voltage to the second electrode, wherein the metal region further comprises a filament structure characterized by a length depending on an operating voltage applied to the first electrode or the second electrode. 16. A non-volatile resistive switching memory device, comprising: a first electrode;a second electrode comprising a metal region;a switching material in direct contact with the metal region of the second electrode;a resistive material disposed between the second electrode and the switching material, the resistive material having an ohmic characteristic and having a resistance substantially the same as an on state resistance. 17. The device of claim 16 wherein the switching material is characterized by a first resistance, the first resistance depends on a voltage applied to the first electrode or the second electrode. 18. The device of claim 16 wherein the resistive material is characterized by a second resistance independence of the voltage applied to the first electrode or the second electrode. 19. The device of claim 16 wherein the resistive material forms a first interface with the switching material, the first interface is having an ohmic characteristic and free of a Schottky barrier. 20. The device of claim 16 wherein the resistive material forms a second interface with the second electrode, the second interface is having an ohmic characteristic and free of a Schottky barrier. 21. The device of claim 16 wherein the on-state resistance is a low resistance state of the switching device. 22. The device of claim 16 wherein the switching device is free of an external current compliance. 23. The device of claim 16 wherein the switching device is further characterized by an erase voltage substantially the same as a write voltage. 24. The device of claim 16 wherein the resistive material is a doped semiconductor material. 25. The device of claim 16 wherein the resistive material comprises a composite of an insulator material and a metal material, wherein the metal material is characterized by a concentration or a gradient in the insulator material, the resistance of the insulator material is adjusted by the concentration or the gradient of the metal material or a combination. 26. The device of claim 16 wherein the resistive material comprises at least a semiconductor material and a metal material, wherein the metal material is characterized by a concentration or a gradient in the resistive material, the resistance of the semiconductor material is adjusted by the concentration or the gradient of the metal material or a combination. 27. The device of claim 16 further comprises a metal material interposed between the switching material and the resistive material; the metal material prevents a non-ohmic interface between the switching material and the resistive material.
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