Method for bonding a wire conductor laid on a substrate
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01P-011/00
H01Q-013/00
출원번호
US-0212882
(2008-09-18)
등록번호
US-8413316
(2013-04-09)
우선권정보
EP-07018301 (2007-09-18)
발명자
/ 주소
O'Keeffe, Seamus
Morley, Brendan
출원인 / 주소
Hid Global Ireland Teoranta
대리인 / 주소
Sheridan Ross P.C.
인용정보
피인용 횟수 :
0인용 특허 :
61
초록▼
Method for bonding a wire conductor arranged on a preferably card-like substrate during the manufacture of a transponder unit having a wire coil and a chip module, comprising a first phase, wherein the coil is permanently joined with the substrate, and a second phase, wherein the wire conductor and
Method for bonding a wire conductor arranged on a preferably card-like substrate during the manufacture of a transponder unit having a wire coil and a chip module, comprising a first phase, wherein the coil is permanently joined with the substrate, and a second phase, wherein the wire conductor and the chip module are bonded, whereas in the first phase at least one of the end portions of the wire conductor intended for later bonding with the chip module is attached to the substrate with a free loop being formed, and that the loop thus formed is gripped in a second phase and a section of the loop is then bonded with a bonding area of the chip module and attached to it in an electronically conductive manner.
대표청구항▼
1. A method for bonding a wire conductor arranged on a substrate during the manufacture of a transponder unit having a wire coil and a chip module, comprising: in a first phase, permanently joining the coil with the substrate; and in a second phase, bonding the wire conductor to the chip module, whe
1. A method for bonding a wire conductor arranged on a substrate during the manufacture of a transponder unit having a wire coil and a chip module, comprising: in a first phase, permanently joining the coil with the substrate; and in a second phase, bonding the wire conductor to the chip module, wherein in the first phase at least one of the end portions of the wire conductor intended for later bonding with the chip module is attached to the substrate with a free loop being formed, and that the loop thus formed is gripped in a second phase and a section of the loop is then bonded with a terminal area of the chip module and attached to the terminal area in an electrically conductive manner and wherein in the second phase the loop is gripped by two grippers that take up a section of the loop between them and that are moved in such a manner, relative to the chip module and relative to each other, that said section of the loop finally at least substantially forms a straight line that covers a terminal area of a chip module. 2. The method according to claim 1, wherein the loop protrudes in such a way from the substrate that the loop can be gripped without the two grippers touching the substrate and the loop protrudes such that the plane in which the loop lies includes an angle of between 25 and 90 degrees with the substrate surface. 3. The method according to claim 1, wherein the loop is formed such in the first phase that the loop lies next to the chip module. 4. The method according to claim 3, wherein the loop is formed in a first phase such that the loop is followed by a section of wire conductor which is laid onto the substrate aligned in such a way that the imagined extension of said section of the wire conductor covers a terminal area of the chip module. 5. The method according to claim 1, wherein at least one of the two grippers applies a clamping force to the wire conductor; and wherein the clamping force is at least temporarily limited, namely in such a way that the wire conductor is pulled through said grippers in a gliding manner as soon as the wire conductor is subjected to tensile stress. 6. The method according to claim 5, wherein, subsequent to the gripping of the loop, the loop is pulled in such a way so that an end portion of the loop detaches from the substrate or tears open the loop and the end portion of the wire conductor exists as a free end. 7. The method according to claim 6, wherein the at least one gripper whose clamping force is limited is the gripper closest to the free end of the wire conductor. 8. The method according to claim 1, wherein the loop is dimensioned such that the loop can be tilted or folded onto the chip module in the direction of the substrate surface and hits the terminal area of the chip module allocated to the loop. 9. The method according to claim 1, wherein the method is carried out by two grippers which in the second phase grip a section of the loop, guide the gripped section to a terminal area of the chip module and then align the loop with the terminal area of the chip module. 10. The method according to claim 1, wherein at least one of the two grippers is a suction gripper adapted to suck the wire conductor of the loop into a centering device, which forces the wire conductor into a defined position, a location of which relative to the allocated terminal area of the chip module is known. 11. The method according to claim 10, wherein the at least one of the two grippers is provided with a pressure organ that is separately movable in relation to the at least one of the two grippers which presses the wire conductor out of a defined position at the at least one of the two grippers against the terminal area as soon as the at least one of the two grippers has positioned the wire conductor above the terminal area. 12. The method according to claim 11, wherein the pressure organ is coupled to an ultrasonic source for the purpose of ultrasonic friction welding. 13. The method according to claim 1, wherein the end portion of the wire conductor is drawn over the terminal area so that the wire conductor traverses the terminal area and is only then connected to the terminal area in an electrically conductive manner. 14. The method according to claim 1, wherein the first phase is carried out in a first processing station and the second phase in a second processing station which is spatially separated from the first processing station.
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