Systems and methods for a core management system for parallel processing of an evolutionary algorithm
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-015/18
G06F-015/00
G06F-015/76
G06F-015/16
G06N-003/00
G06N-003/12
출원번호
US-0550724
(2009-08-31)
등록번호
US-8433662
(2013-04-30)
발명자
/ 주소
Ferringer, Matthew Phillip
Clifton, Ronald Scott
Thompson, Timothy Guy
출원인 / 주소
The Aerospace Corporation
대리인 / 주소
Sutherland Asbill & Brennan LLP
인용정보
피인용 횟수 :
7인용 특허 :
3
초록▼
Systems and methods are provided for a core management system for parallel processing of an evolutionary algorithm. The systems and methods may include identifying, for a processing environment, a plurality of arriving processors available for utilization; configuring a first number of the plurality
Systems and methods are provided for a core management system for parallel processing of an evolutionary algorithm. The systems and methods may include identifying, for a processing environment, a plurality of arriving processors available for utilization; configuring a first number of the plurality of arriving processors as master processors for the processing environment; configuring a respective second number of the plurality of arriving processors as slave processors, where each master processor is assigned one or more of the slave processors for the processing environment, where each master processor maintains timing data associated with available processing resources at the respective master processor, where each master processor is operative to calculate a respective target number of slaves based upon the respective timing data; and reconfiguring a current number of slave processors assigned to one or more respective master processors based upon the respective timing data calculated for the one or more respective master processors.
대표청구항▼
1. A method for parallel processing of an evolutionary algorithm, comprising: identifying, by a manager processor for a processing environment in accordance with the evolutionary algorithm, a plurality of arriving processors available for utilization;configuring, by the manager processor, a first nu
1. A method for parallel processing of an evolutionary algorithm, comprising: identifying, by a manager processor for a processing environment in accordance with the evolutionary algorithm, a plurality of arriving processors available for utilization;configuring, by the manager processor, a first number of the plurality of arriving processors as master processors for the processing environment;configuring, by the manager processor, a respective second number of the plurality of arriving processors as slave processors, wherein each master processor is assigned one or more of the slave processors for the processing environment, wherein each master processor maintains timing data associated with available processing resources at the respective master processor, wherein each master processor is operative to calculate a respective target number of slaves based upon the respective timing data; andreconfiguring, by the managing processor, a current number of slave processors assigned to one or more respective master processors based upon the respective timing data calculated for the one or more respective master processors. 2. The method of claim 1, wherein the timing data includes a first total elapsed time associated with the respective master processor, a second total time that the respective master processor spends communicating with respective assigned slave processors to send work and receive results, and a third total time spent by the master processor performing processing in accordance with the evolutionary algorithm. 3. The method of claim 2, wherein in calculating the respective target number of slaves based upon the respective timing data, each master processor is further configured to calculate: a target reserve time based using (i) the first total elapsed time associated with the respective master processor and (ii) a reserve time percentage;an average time communicating with slaves based upon (i) the second total time that the respective master processor spends communicating with assigned slave processors to send work and receives results and (ii) a current number of chromosomes processed within the first total elapsed time; andan average time spent on processing duties based upon (i) the third total time spent by the master processor performing processing in accordance with the evolutionary algorithm and (ii) the current number of chromosomes processed within the first total elapsed time. 4. The method of claim 3, wherein each master processor is configured to calculate: the target reserve time by multiplying (i) the first total elapsed time associated with the respective master processor and (ii) the reserve time percentage;the average time communicating with slaves by dividing (i) the second total time that the respective master processor spends communicating with assigned slave processors to send work and receive results and (ii) a current number of chromosomes processed within the first total elapsed time; andthe average time spent on processing duties by dividing (i) the third total time spent by the master processor performing processing in accordance with the evolutionary algorithm and (ii) the current number of chromosomes processed within the first total elapsed time. 5. The method of claim 3, wherein each master processor is configured to calculate the respective target number of slaves using at least (i) the target reserve time, (ii) the average time communicating with slaves, and (iii) the average time spent on processing duties. 6. The method of claim 5, wherein each master processor is configured to calculate the respective target number of slaves by: dividing (i) a difference between a target elapsed time and the target reserve time by (ii) a summation of the average time communicating with slaves and the average time spent on processing duties, to generate a target number of chromosome data structures; andmultiplying a generated target number of chromosome data structures by a ratio of the current number of slaves to the current number of chromosomes processed within the first total elapsed time. 7. The method of claim 5, wherein at least one of the manager processor, the master processors, or the slave processors leave the processing environment as at least one departing processor, wherein a replacement processor for the at least one departing processor is selected from the plurality of arriving processors. 8. The method of claim 1, wherein a first master processor is underweighted with respect to currently assigned first slave processors if a first calculated target number of slaves is greater than the currently assigned first slave processors for the first master processor, and wherein a second master processor is overweighed with respect to currently assigned second slave processors if a second calculated target number of slaves is less than the currently assigned second slave processors. 9. The method of claim 8, wherein the manager processor adds one or more slave processors to the first slave processors assigned the underweighted first master processor; and wherein the manager processor removes one or more slave processors from the second slave processors assigned to the overweighted second master processor. 10. The method of claim 9, wherein one or more of the added slave processors are obtained from (i) the one or more removed slave processors, or (ii) the plurality of arriving processors. 11. A system for parallel processing of an evolutionary algorithm, comprising: a memory that stores computer-executable instructions;computer processor configured to access the memory, wherein the computer processor is further configured to execute the computer-executable instructions to: identify, for a processing environment in accordance with the evolutionary algorithm, a plurality of arriving processors available for utilization;configure a first number of the plurality of arriving processors as master processors for the processing environment;configure a respective second number of the plurality of arriving processors as slave processors, wherein each master processor is assigned one or more of the slave processors for the processing environment, wherein each master processor maintains timing data associated with available processing resources at the respective master processor, wherein each master processor is operative to calculate a respective target number of slaves based upon the respective timing data; andreconfigure a current number of slave processors assigned to one or more respective master processors based upon the respective timing data calculated for the one or more respective master processors. 12. The system of claim 11, wherein the timing data includes a first total elapsed time associated with the respective master processor, a second total time that the respective master processor spends communicating with respective assigned slave processors to send work and receive results, and a third total time spent by the master processor performing processing in accordance with the evolutionary algorithm. 13. The system of claim 12, wherein in calculating the respective target number of slaves based upon the respective timing data, each master processor is further configured to calculate: a target reserve time based using (i) the first total elapsed time associated with the respective master processor and (ii) a reserve time percentage;an average time communicating with slaves based upon (i) the second total time that the respective master processor spends communicating with assigned slave processors to send work and receive results and (ii) a current number of chromosomes processed within the first total elapsed time; andan average time spent on processing duties based upon (i) the third total time spent by the master processor performing processing in accordance with the evolutionary algorithm and (ii) the current number of chromosomes processed within the first total elapsed time. 14. The system of claim 13, wherein each master processor is configured to calculate: the target reserve time by multiplying (i) the first total elapsed time associated with the respective master processor and (ii) the reserve time percentage;the average time communicating with slaves by dividing (i) the second total time that the respective master processor spends communicating with assigned slave processors to send work and receives results and (ii) a current number of chromosomes processed within the first total elapsed time; andthe average time spent on processing duties by dividing (i) the third total time spent by the master processor performing processing in accordance with the evolutionary algorithm and (ii) the current number of chromosomes processed within the first total elapsed time. 15. The system of claim 13, wherein each master processor is configured to calculate the respective target number of slaves using at least (i) the target reserve time, (ii) the average time communicating with slaves, and (iii) the average time spent on processing duties. 16. The system of claim 15, wherein each master processor is configured to calculate the respective target number of slaves by: dividing (i) a difference between a target elapsed time and the target reserve time by (ii) a summation of the average time communicating with slaves and the average time spent on processing duties, to generate a target number of chromosome data structures; andmultiplying a generated target number of chromosome data structures by a ratio of the current number of slaves to the current number of chromosomes processed within the first total elapsed time. 17. The system of claim 15, wherein at least one of the master processors, or the slave processors leave the processing environment as at least one departing processor, wherein the computer processor is further configured to execute the computer-executable instructions to select a replacement processor for the at least one departing processor from the plurality of arriving processors. 18. The system of claim 11, wherein a first master processor is underweighted with respect to currently assigned first slave processors if a first calculated target number of slaves is greater than the currently assigned first slave processors for the first master processor, and wherein a second master processor is overweighed with respect to currently assigned second slave processors if a second calculated target number of slaves is less than the currently assigned second slave processors. 19. The system of claim 18, wherein the computer processor is further configured to execute the computer-executable instructions to: add one or more slave processors to the first slave processors assigned the underweighted first master processor; andremove one or more slave processors from the second slave processors assigned to the overweighted second master processor. 20. The system of claim 19, wherein one or more of the added slave processors are obtained from (i) the one or more removed slave processors, or (ii) the plurality of arriving processors.
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이 특허에 인용된 특허 (3)
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