IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0886064
(2010-09-20)
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등록번호 |
US-8445961
(2013-05-21)
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발명자
/ 주소 |
- Khandelwal, Sourabh
- Watts, Josef S.
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출원인 / 주소 |
- International Business Machines Corporation
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
0 인용 특허 :
4 |
초록
▼
In one embodiment, a body region of a body-contacted silicon-on-insulator (SOI) metal-oxide-semiconductor-field-effect-transistor (MOSFET) is connected to a gate of another MOSFET in a sensing circuit to form a floating body node. The voltage at the floating body node is accurately obtained at the o
In one embodiment, a body region of a body-contacted silicon-on-insulator (SOI) metal-oxide-semiconductor-field-effect-transistor (MOSFET) is connected to a gate of another MOSFET in a sensing circuit to form a floating body node. The voltage at the floating body node is accurately obtained at the output of the sensing circuit and used to provide an estimate of required floating body voltage over a full device operating range.
대표청구항
▼
1. A structure, comprising: a first body-contacted silicon-on-insulator (SOI) metal-oxide-semiconductor-field-effect-transistor (MOSFET) device having a drain region, a source region, a body region separating the drain region from the source region, and a gate disposed above the body region; anda se
1. A structure, comprising: a first body-contacted silicon-on-insulator (SOI) metal-oxide-semiconductor-field-effect-transistor (MOSFET) device having a drain region, a source region, a body region separating the drain region from the source region, and a gate disposed above the body region; anda sensing circuit, coupled to the first body-contacted SOI MOSFET device, having an input and an output, the input of the sensing circuit having a high impedance and the output of the sensing circuit having a low impedance, wherein the body region of the first body-contacted SOI MOSFET device is coupled to the input of the sensing circuit to form a floating body node, wherein a voltage measure of the floating body node is obtained at the output of the sensing circuit. 2. The structure according to claim 1, wherein the voltage measure of the floating body node obtained at the output of the sensing circuit provides an estimate of floating body voltage for other body-contacted SOI MOSFET devices having geometries similar to the first body-contacted SOI MOSFET device. 3. The structure according to claim 1, further comprising a voltmeter configured to be coupled to the output of the sensing circuit to obtain the voltage measure of the floating body node. 4. The structure according to claim 1, wherein the sensing circuit comprises a second body-contacted SOI MOSFET device coupled to a third body-contacted SOI MOSFET device, wherein the second body-contacted SOI MOSFET device and the third body-contacted SOI MOSFET device each has a drain region, a source region, a body region separating the drain region from the source region, and a gate disposed above the body region, and wherein the source region of the second SOI MOSFET and the gate and the drain region of the third body-contacted SOI MOSFET device are connected together to form the output of the sensing circuit, and wherein the gate of the second body-contacted SOI MOSFET device forms the input of the sensing circuit. 5. The structure according to claim 4, wherein the drain region of the second body-contacted SOI MOSFET device is connected to a positive power supply and the source region of the third body-contacted SOI MOSFET device is connected to a negative power supply. 6. The structure of claim 4, wherein the drain region of the second body-contacted SOI MOSFET device is connected to a positive power supply and the source region of the third body-contacted SOI MOSFET device is connected to ground. 7. The structure of claim 4, wherein the input of the sensing circuit has a high impedance and the output of the sensing circuit has a low impedance. 8. A structure, comprising: an input;an output;a power supply port;a ground port;a first metal-oxide-semiconductor-field-effect-transistor (MOSFET) device having a drain region, a source region, a body region separating the drain region from the source region, and a gate disposed above the body region, wherein the gate of the first MOSFET device is coupled to the input, the drain region of the first MOSFET device is coupled to the power supply port, the body region of the first MOSFET device is coupled to the source region of the first MOSFET device, the source region of the first MOSFET device is coupled to the output; anda second metal-oxide-semiconductor-field-effect-transistor (MOSFET) device having a drain region, a source region, a body region separating the drain region from the source region, and a gate disposed above the body region, wherein the drain region of the second MOSFET device is coupled to the source region of the first MOSFET device, the gate of the second MOSFET device is coupled to the drain region of the second MOSFET device, the body region of the second MOSFET device is coupled to the source region of the second MOSFET device, the source region of the second MOSFET device is coupled to the ground port. 9. The structure according to claim 8, wherein the first MOSFET device and the second MOSFET device have identical geometries. 10. The structure according to claim 8, wherein the first MOSFET device and the second MOSFET device have identical doping concentrations. 11. The structure according to claim 8, wherein the first MOSFET device and the second MOSFET device each has a gate input leakage of less than about 1 pico amp (pA). 12. The structure according to claim 8, wherein the first MOSFET device and the second MOSFET device each has a threshold voltage of less than about 100 milli volts (mV). 13. The structure according to claim 8, further comprising a third MOSFET device having a drain region, a source region, a body region separating the drain region from the source region, and a gate disposed above the body region, wherein the gate, source region and drain region of the third MOSFET device are configured to allow for an externally applied voltage, and wherein the body region of the third MOSFET device is coupled to the input that is coupled to the gate of the first MOSFET device.
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