IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0306400
(2011-11-29)
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등록번호 |
US-8498365
(2013-07-30)
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발명자
/ 주소 |
- Kolze, Thomas
- Currivan, Bruce
- Min, Jonathan
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
0 인용 특허 :
14 |
초록
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Systems and methods are disclosed for detecting temporary high level impairments, such as noise or interference, for example, in a communications channel, and subsequently, mitigating the deleterious effects of the dynamic impairments. In one embodiment, the method not only performs dynamic characte
Systems and methods are disclosed for detecting temporary high level impairments, such as noise or interference, for example, in a communications channel, and subsequently, mitigating the deleterious effects of the dynamic impairments. In one embodiment, the method not only performs dynamic characterization of channel fidelity against impairments, but also uses this dynamic characterization of the channel fidelity to adapt the receiver processing and to affect an improvement in the performance of the receiver. For example, in this embodiment, the method increases the accuracy of the estimation of the transmitted information, or similarly, increases the probability of making the correct estimates of the transmitted information, even in the presence of temporary severe levels of impairment. The channel fidelity history may also be stored and catalogued for use in, for example, future optimization of the transmit waveform.
대표청구항
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1. An apparatus, comprising: a receiver front end to generate a plurality of error estimates of a signal including a plurality of concurrently modulated symbols having temporary impairment, wherein the plurality of error estimates is based, at least in part, on a plurality of error power estimates;a
1. An apparatus, comprising: a receiver front end to generate a plurality of error estimates of a signal including a plurality of concurrently modulated symbols having temporary impairment, wherein the plurality of error estimates is based, at least in part, on a plurality of error power estimates;a fidelity processor to generate a plurality of channel fidelity metrics based on the plurality of error estimates; anda decoder to decode the signal iteratively using a plurality of branch metrics that are respectively based on the plurality of channel fidelity metrics. 2. The apparatus of claim 1, further comprising: an encoder to re-encode the decoded signal thereby generating a re-encoded signal; and wherein:the receiver front end to generate at least one additional error estimate of the signal, based on the re-encoded signal, for use in decoding the signal. 3. The apparatus of claim 1, further comprising: a multi-tap delay line to receive the plurality of error estimates of the signal; and wherein:the fidelity processor to generate the plurality of channel fidelity metrics based a sliding window of the plurality of error estimates as provided by the multi-tap delay line. 4. The apparatus of claim 1, wherein: the receiver front end to generate the plurality of error power estimates based on the plurality of error estimates of the signal; and the fidelity processor to generate the plurality of channel fidelity metrics based on the plurality of error power estimates. 5. The apparatus of claim 1, wherein: the signal having at least one symbol erased therein based on at least one of the plurality of error estimates. 6. An apparatus, comprising: a receiver front end to generate an error estimate of a signal, wherein the error estimate is based, at least in part, on an error power estimate;a fidelity processor to generate a channel fidelity metric based on the error estimate; anda decoder to decode the signal using a branch metric that is modified based on the channel fidelity metric. 7. The apparatus of claim 6, further comprising: an encoder to re-encode the decoded signal thereby generating a re-encoded signal; and wherein:the receiver front end to generate at least one additional error estimate of the signal, based on the re-encoded signal, for use in decoding the signal. 8. The apparatus of claim 7, wherein: the decoder including a first decoder to decode the signal and a second decoder to decode a delayed version of the signal. 9. The apparatus of claim 6, further comprising: a multi-tap delay line to receive a plurality of error estimates of the signal, including the error estimate of the signal; and wherein:the fidelity processor to generate the channel fidelity metric based a sliding window of the plurality of error estimates as provided by the multi-tap delay line. 10. The apparatus of claim 6, wherein: the decoder to decode the signal having at least one symbol erased therein based on the error estimate of the signal. 11. The apparatus of claim 6, wherein: the receiver front end to generate the error power estimate based on the error estimate of the signal; and the fidelity processor to generate the channel fidelity metric based on the error power estimate. 12. The apparatus of claim 6, wherein: the receiver front end to generate a plurality of error estimates of the signal including the error estimate of the signal;the fidelity processor to generate a plurality of channel fidelity metrics, including the channel fidelity metric, based on the plurality of error estimates; andthe decoder to decode the signal iteratively using a plurality of branch metrics respectively, including the branch metric that is modified based on the channel fidelity metric, based on the plurality of channel fidelity metrics. 13. The apparatus of claim 6, wherein: the signal including a plurality of concurrently modulated symbols having temporary impairment. 14. An apparatus, comprising: a decoder to decode a signal thereby generating a decoded signal;an encoder to re-encode the decoded signal thereby generating a re-encoded signal;a fidelity processor to generate a channel fidelity metric based on an error estimate that is based on the signal and the re-encoded signal; and wherein:the error estimate is based, at least in part, on an error power estimate;the decoder to decode the signal using a branch metric that is modified based on the channel fidelity metric. 15. The apparatus of claim 14, further comprising: a receiver front end to generate at least one additional error estimate of the signal; and wherein:the channel fidelity metric is based on the error estimate that is based on the signal and the re-encoded signal as well as based on the at least one additional error estimate of the signal. 16. The apparatus of claim 14, wherein: the error estimate that is based on the signal and the re-encoded signal being the error power estimate which is based on the signal and the re-encoded signal; and further comprising:a receiver front end to generate at least one additional error power estimate of the signal; and wherein:the channel fidelity metric is based on the error power estimate that is based on the signal and the re-encoded signal as well as based on the at least one additional error power estimate of the signal. 17. The apparatus of claim 14, wherein: the decoder including a first decoder to decode the signal and a second decoder to decode a delayed version of the signal. 18. The apparatus of claim 14, wherein: the decoder to decode the signal iteratively using a plurality of branch metrics respectively, including the branch metric that is modified based on the channel fidelity metric, based on the plurality of channel fidelity metrics. 19. The apparatus of claim 14, further comprising: a receiver front end to generate a plurality of error estimates of the signal; and wherein:the fidelity processor to generate the channel fidelity metric based on an error estimate that is based on the signal and the re-encoded signal as well as based on the at least one additional error estimate of the signal. 20. The apparatus of claim 14, wherein: the signal including a plurality of concurrently modulated symbols having temporary impairment.
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