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Method and system for optimizing gain changes by identifying modulation type and rate 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04L-027/08
출원번호 US-0367049 (2003-02-14)
등록번호 US-8498368 (2013-07-30)
발명자 / 주소
  • Husted, Paul J.
  • McFarland, William J.
  • Meng, Teresa H.
  • Thomson, John S.
출원인 / 주소
  • QUALCOMM Incorporated
대리인 / 주소
    Bever, Hoffman & Harms, LLP
인용정보 피인용 횟수 : 62  인용 특허 : 18

초록

In some wireless local area networks (WLANs), signals of different modulation types and rates can be received. To operate optimally, the gain of an amplifier in a receiver can be set based on a specific modulation type and rate. For example, the gain of a receive path amplifier can be changed based

대표청구항

1. A method of changing a gain of a receive path amplifier in a receiver that operates upon a received data packet including a plurality of symbols, at least one of the symbols including a unique identifying characteristic, the method comprising: locating the unique identifying characteristic;analyz

이 특허에 인용된 특허 (18)

  1. Kandala, Srinivas, Data unit detection including antenna diversity.
  2. Kenney Thomas J. ; Niva Ilkka ; Gray Steven D. ; Dowling Joe, Device and method for detection and reduction of intermodulation distortion.
  3. Chethik Frank, Digital receiver having programmable complex threshold detectors and threshold interpreters.
  4. Hill, Lawrence W.; Sarles, F. Williams, Downhole telemetry and control system.
  5. Somayazulu, V. Srinivasa; Kandala, Srinivas; Kowalski, John M.; Park, Chan K., Extension of wireless local area network communication system to accommodate higher data rates while preserving legacy receiver features.
  6. Kumar Derek D., In-band on-channel digital broadcasting method and system.
  7. McFarland,William; Meng,Teresa H.; Husted,Paul J.; Thomson,John S., Method and apparatus for maximizing receiver performance utilizing mid-packet gain changes.
  8. Uskali, Robert; Hart, Jr., William C.; Iehl, Brian, Method and apparatus for obtaining optimal performance in a receiver.
  9. Isaksson Mikael,SEX ; Engstroem Bo,SEX, Method and device for synchronization at OFDM-system.
  10. Anders Khullar SE; Niklas Stenstrom SE, Method and system for blind detection of modulation.
  11. Thomas W. Bucht, Method and system for decoding 8-bit/10-bit data using limited width decoders.
  12. Matthias Kindler DE; Peter Schollhorn DE, Method for processing a signal containing data symbols.
  13. Kaiser Stefan,DEX ; Fazel Khaled,DEX, Method of simultaneous radio transmission of digital data between a plurality of subscriber stations and a base station.
  14. Crawford, James A., OFDM pilot tone tracking for wireless LAN.
  15. Ojard, Eric; Trachewsky, Jason; Holloway, John T.; Frank, Edward H.; Peterson, Kevin H., Off-line broadband network interface.
  16. Belotserkovsky, Maxim B.; Litwin, Jr., Louis Robert, Sampling offset correction in an orthogonal frequency division multiplexing system.
  17. Poon Tommy C. ; Bao Jay ; Mizutani Yoshiki,JPX ; Nakayama Hiroyuki,JPX, Universal modem for digital video, audio and data communications.
  18. Liepe Steven F. (Fort Collins CO) Schwartz Jeffrey D. (Loveland CO) Nash Mark E. (Lyons CO), Using read channel noise to initialize read channel for head position calibration in a magnetic data storage device.

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  1. Ulrich, Roger; Shokrollahi, Amin, Bus reversable orthogonal differential vector signaling codes.
  2. Ulrich, Roger; Shokrollahi, Amin, Bus reversible orthogonal differential vector signaling codes.
  3. Ulrich, Roger; Hunt, Peter, Circuits for efficient detection of vector signaling codes for chip-to-chip communication.
  4. Ulrich, Roger; Hunt, Peter, Circuits for efficient detection of vector signaling codes for chip-to-chip communication.
  5. Ulrich, Roger; Hunt, Peter, Circuits for efficient detection of vector signaling codes for chip-to-chip communication.
  6. Simpson, Richard; Stewart, Andrew Kevin John; Hormati, Ali, Clock data alignment system for vector signaling code communications link.
  7. Kim, Tae Jin; Baek, Chang Hoon; Lee, Sang Kyu; Lee, Jae Youl, Clock data recovery circuit and a method of operating the same.
  8. Shokrollahi, Amin; Holden, Brian; Simpson, Richard, Clock-embedded vector signaling codes.
  9. Simpson, Richard; Ulrich, Roger, Control loop management and vector signaling code communications links.
  10. Ulrich, Roger, Data-driven voltage regulator.
  11. Cronie, Harm; Shokrollahi, Amin, Differential vector storage for dynamic random access memory.
  12. Tajalli, Armin; Cronie, Harm; Shokrollahi, Amin, Efficient processing and detection of balanced codes.
  13. Tajalli, Armin, Enhanced phase interpolation circuit.
  14. Cronie, Harm; Shokrollahi, Amin, Error control coding for orthogonal differential vector signaling.
  15. Shokrollahi, Amin; Ulrich, Roger, Fault tolerant chip-to-chip communication with advanced voltage.
  16. Tajalli, Armin, High performance phase locked loop.
  17. Hormati, Ali; Tajalli, Armin; Shokrollahi, Amin, High speed communications system.
  18. Hormati, Ali; Tajalli, Armin; Shokrollahi, Amin, High speed communications system.
  19. Tajalli, Armin, Lock detector for phase lock loop.
  20. Hormati, Ali, Low power chip-to-chip bidirectional communications.
  21. Amiri, Omid Talebi; Simpson, Richard, Low power multilevel driver.
  22. Shokrollahi, Amin; Ulrich, Roger, Method and apparatus for high speed chip-to-chip communications.
  23. Shokrollahi, Amin; Ulrich, Roger, Method and apparatus for high speed chip-to-chip communications.
  24. Fox, John; Holden, Brian; Hunt, Peter; Keay, John D.; Shokrollahi, Amin; Simpson, Richard; Singh, Anant; Stewart, Andrew Kevin John; Surace, Giuseppe, Methods and systems for chip-to-chip communication with reduced simultaneous switching noise.
  25. Fox, John; Holden, Brian; Hunt, Peter; Keay, John D.; Shokrollahi, Amin; Stewart, Andrew Kevin John; Surace, Giuseppe; Ulrich, Roger; Simpson, Richard, Methods and systems for high bandwidth chip-to-chip communcations interface.
  26. Fox, John; Holden, Brian; Hormati, Ali; Hunt, Peter; Keay, John D.; Shokrollahi, Amin; Simpson, Richard; Singh, Anant; Stewart, Andrew Kevin John; Surace, Giuseppe; Ulrich, Roger, Methods and systems for high bandwidth communications interface.
  27. Fox, John; Holden, Brian; Hormati, Ali; Hunt, Peter; Keay, John D.; Shokrollahi, Amin; Simpson, Richard; Singh, Anant; Stewart, Andrew Kevin John; Surace, Giuseppe; Ulrich, Roger, Methods and systems for high bandwidth communications interface.
  28. Fox, John; Holden, Brian; Shokrollahi, Amin; Singh, Anant; Surace, Giuseppe, Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communication.
  29. Shokrollahi, Amin, Methods and systems for reduction of nearest-neighbor crosstalk.
  30. Shokrollahi, Amin, Methods and systems for reduction of nearest-neighbor crosstalk.
  31. Holden, Brian; Shokrollahi, Amin, Methods and systems for selection of unions of vector signaling codes for power and pin efficient chip-to-chip communication.
  32. Holden, Brian; Shokrollahi, Amin; Singh, Anant, Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication.
  33. Holden, Brian; Shokrollahi, Amin; Singh, Anant, Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication.
  34. Tajalli, Armin, Multi-stage sampler with increased gain.
  35. Hormati, Ali; Shokrollahi, Amin, Multidrop data transfer.
  36. Hormati, Ali; Shokrollahi, Amin, Multidrop data transfer.
  37. Hormati, Ali; Shokrollahi, Amin, Multidrop data transfer.
  38. Ulrich, Roger, Multilevel driver for high speed chip-to-chip communications.
  39. Ulrich, Roger, Multilevel driver for high speed chip-to-chip communications.
  40. Ulrich, Roger, Multilevel driver for high speed chip-to-chip communications.
  41. Walter, Christoph, Multiwire linear equalizer for vector signaling code receiver.
  42. Cronie, Harm; Shokrollahi, Amin, Orthogonal differential vector signaling.
  43. Holden, Brian; Shokrollahi, Amin, Orthogonal differential vector signaling codes with embedded clock.
  44. Holden, Brian; Shokrollahi, Amin, Orthogonal differential vector signaling codes with embedded clock.
  45. Holden, Brian; Shokrollahi, Amin, Orthogonal differential vector signaling codes with embedded clock.
  46. Shokrollahi, Amin, Orthogonal differential vector signaling codes with embedded clock.
  47. Amiri, Omid Talebi; Tajalli, Armin, Phase interpolation circuit.
  48. Tajalli, Armin; Shokrollahi, Amin, Quadrature and duty cycle error correction in matrix phase lock loop.
  49. Tajalli, Armin, Sampler with low input kickback.
  50. Shokrollahi, Amin; Wang Johnston, Margaret, Skew-resistant multi-wire channel.
  51. Cronie, Harm; Shokrollahi, Amin, Storage method and apparatus for random access memory using codeword storage.
  52. Tajalli, Armin, Symmetric linear equalization circuit with increased gain.
  53. Tajalli, Armin, Symmetric linear equalization circuit with increased gain.
  54. Stauffer, David R.; Stewart, Andrew Kevin John; Keay, John D., System for generating a test pattern to detect and isolate stuck faults for an interface using transition coding.
  55. Shokrollahi, Amin, Vector signaling code with improved noise margin.
  56. Shokrollahi, Amin, Vector signaling codes with high pin-efficiency for chip-to-chip communication and storage.
  57. Shokrollahi, Amin, Vector signaling codes with high pin-efficiency for chip-to-chip communication and storage.
  58. Shokrollahi, Amin; Ulrich, Roger, Vector signaling codes with increased signal to noise characteristics.
  59. Shokrollahi, Amin, Vector signaling with reduced receiver complexity.
  60. Shokrollahi, Amin, Vector signaling with reduced receiver complexity.
  61. Shokrollahi, Amin, Vector signaling with reduced receiver complexity.
  62. Tajalli, Armin, Voltage sampler driver with enhanced high-frequency gain.
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