IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0217103
(2011-08-24)
|
등록번호 |
US-8525287
(2013-09-03)
|
발명자
/ 주소 |
- Tian, Hui
- Sargent, Edward
|
출원인 / 주소 |
- InVisage Technologies, Inc.
|
대리인 / 주소 |
Schwegman, Lundberg & Woessner, P.A.
|
인용정보 |
피인용 횟수 :
15 인용 특허 :
49 |
초록
▼
A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensiti
A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
대표청구항
▼
1. A photodetector comprising: a semiconductor substrate;a plurality of pixel regions, each pixel region comprising an optically sensitive layer over the substrate, the optically sensitive layer positioned to receive light; anda pixel circuit for each pixel region, each pixel circuit comprising a ch
1. A photodetector comprising: a semiconductor substrate;a plurality of pixel regions, each pixel region comprising an optically sensitive layer over the substrate, the optically sensitive layer positioned to receive light; anda pixel circuit for each pixel region, each pixel circuit comprising a charge store and a switching element between the charge store and the optically sensitive layer for the respective pixel region, the charge store and the switching element of one or more of the pixel circuits integrated on and integrated in the semiconductor substrate below the plurality of pixel regions, the area of the semiconductor substrate for each respective pixel circuit being positioned under a portion of the corresponding pixel region and a portion of another pixel region that is not in electrical communication with the respective pixel circuit. 2. The photodetector of claim 1, wherein the switching element controls an integration period simultaneously for the plurality of pixel regions. 3. The photodetector of claim 1, comprising conductive material positioned between the charge store of the respective pixel region and the optically sensitive layer of the corresponding pixel region such that the respective charge store is shielded from the light incident on the optically sensitive layer, wherein the light is in a wavelength band, wherein at least a portion of the conductive material is a metal layer in electrical communication with the optically sensitive layer. 4. The photodetector of claim 1, wherein the switching element is a transistor. 5. The photodetector of claim 1, wherein the switching element is a diode. 6. The photodetector of claim 1, wherein the switching element is a parasitic diode. 7. The photodetector of claim 1, comprising an opaque material between each pixel circuit and the corresponding pixel region, the opaque material shielding the charge store and the switching element from the light received by the optically sensitive layer. 8. The photodetector of claim 1, comprising circuitry configured to simultaneously switch the switching element of each of the pixel regions. 9. The photodetector of claim 1, wherein each pixel region comprises a respective first electrode and a respective second electrode, wherein the optically sensitive layer of the respective pixel region is positioned between the respective first electrode and the respective second electrode of the respective pixel region. 10. The photodetector of claim 1, wherein the pixel circuit transfers a voltage from a first electrode to the charge store when the switching element of the respective pixel region is in a first state and to block the transfer of the voltage from the first electrode to the charge store when the switching element of the respective pixel region is in a second state. 11. The photodetector of claim 1, comprising circuitry to switch the switching element of each of the pixel circuits from a first state to a second state at the same time for each of the pixel circuits. 12. The photodetector of claim 11, comprising circuitry to switch the switching element of each of the pixel circuits after an integration period of time. 13. The photodetector of claim 12, comprising reset circuitry to reset a voltage difference across the optically sensitive layer while the switching element is in the second state. 14. The photodetector of claim 13, comprising reset circuitry to initiate another integration period of time while the switching element is in the second state. 15. The photodetector of claim 13, the reset circuitry comprising at least one of a transistor, a diode, and a parasitic diode. 16. The photodetector of claim 9, the reset circuitry being configured to vary the voltage of the second electrode of each pixel region to reset the voltage difference across the optically sensitive layer. 17. The photodetector of claim 13, wherein the reset circuitry resets the voltage difference across the optically sensitive layer after the end of a respective integration period and before all of the voltages transferred to the charge store for the respective integration period have been selected to be read out by the read out circuitry. 18. The photodetector of claim 13, wherein the reset circuitry initiates a next subsequent integration period before all of the voltages transferred to the charge store for the prior integration period have been selected to be read out by the read out circuitry. 19. The photodetector of claim 1, comprising a reset circuit having a first state to reset the voltage difference across the optically sensitive layer, a second state to integrate charge based on the flow of current across the optically sensitive layer, and a third state to transfer a voltage from a first electrode to the charge store. 20. The photodetector of claim 1, comprising a first reset circuit to reset a voltage difference across the optically sensitive layer after the end of a respective integration period and a second reset circuit configured to reset the voltage of the charge store. 21. The photodetector of claim 20, wherein the first reset circuit resets the voltage difference while the switching element is in the second state. 22. The photodetector of claim 21, wherein the second reset circuit resets the charge store independently of the reset circuitry for the voltage difference across the optically sensitive layer. 23. The photodetector of claim 1, comprising read out circuitry to read out a signal from the charge store for each pixel circuit corresponding to a selected row of pixel regions. 24. The photodetector of claim 23, wherein the read out circuit of one or more of the pixel regions is integrated on and integrated in the semiconductor substrate below the plurality of pixel regions. 25. The photodetector of claim 23, wherein the read out circuitry reads out sequential rows of the pixel regions. 26. The photodetector of claim 1, wherein the optically sensitive layer of each pixel region is positioned between a respective first electrode and a respective second electrode. 27. The photodetector of claim 26, wherein a distance between the first electrode and the second electrode of each pixel region is less than approximately 3 micrometers. 28. The photodetector of claim 26, wherein a distance between the first electrode and the second electrode of each pixel region is less than approximately 2 micrometers. 29. The photodetector of claim 26, wherein a distance between the first electrode and the second electrode of each pixel region is less than approximately 1.5 micrometers. 30. The photodetector of claim 26, wherein the optically sensitive layer for each pixel region has a top surface area of less than approximately 6 square micrometers. 31. The photodetector of claim 26, wherein the optically sensitive layer for each pixel region has a top surface area of less than approximately 5 square micrometers. 32. The photodetector of claim 26, wherein the optically sensitive layer for each pixel region has a top surface area of less than approximately 4 square micrometers. 33. The photodetector of claim 26, wherein the pixel circuit applies a voltage difference across the optically sensitive layer. 34. The photodetector of claim 33, wherein the optically sensitive layer has a photoconductive gain when the voltage difference is applied and the optically sensitive layer is exposed to the light. 35. The photodetector of claim 1, wherein the optically sensitive layer comprises a nanocrystal material having photoconductive gain and a responsivity of at least approximately 0.4 amps/volt (A/V). 36. The photodetector of claim 35, wherein the responsivity is achieved when a bias is applied across the optically sensitive layer, wherein the bias is approximately in a range of 1 volt to 5 volts. 37. The photodetector of claim 1, wherein the optically sensitive layer comprises monodisperse nanocrystals. 38. The photodetector of claim 1, wherein the optically sensitive layer comprises a continuous film of interconnected nanocrystal particles in contact with a respective first electrode and a common electrode. 39. The photodetector of claim 38, wherein the nanocrystal particles comprise a plurality of nanocrystal cores and a shell over the plurality of nanocrystal cores. 40. The photodetector of claim 39, wherein the plurality of nanocrystal cores are fused. 41. The photodetector of claim 39, wherein a physical proximity of the nanocrystal cores of adjacent nanocrystal particles provides electrical communication between the adjacent nanocrystal particles. 42. The photodetector of claim 41, wherein the physical proximity includes a separation distance of less than approximately 0.5 nm. 43. The photodetector of claim 41, wherein the electrical communication includes a hole mobility of at least approximately 1E-5 square centimeter per volt-second across the nanocrystal particles. 44. The photodetector of claim 39, wherein the plurality of nanocrystal cores are electrically interconnected with linker molecules. 45. The photodetector of claim 1, wherein the optically sensitive layer comprises a unipolar photoconductive layer including a first carrier type and a second carrier type, wherein a first mobility of the first carrier type is higher than a second mobility of the second carrier type. 46. The photodetector of claim 1, wherein the semiconductor substrate includes an integrated circuit, wherein the integrated circuit includes at least a portion of the pixel circuit. 47. The photodetector of claim 1, wherein the optically sensitive layer can be configured as a current source. 48. The photodetector of claim 1, wherein the optically sensitive layer can be configured as a current sink. 49. The photodetector of claim 1, wherein the charge store is a storage element, wherein the charge store is coupled to the optically sensitive layer and establishes a voltage. 50. The photodetector of claim 49, wherein the charge store is independent from the optically sensitive layer and isolated from a source of light. 51. The photodetector of claim 49, wherein the charge store is a capacitor. 52. The photodetector of claim 49, wherein the charge store is a parasitic capacitance. 53. The photodetector of claim 49, wherein the pixel circuit includes a reset mechanism coupled to the optically sensitive layer. 54. The photodetector of claim 53, wherein the reset mechanism resets the optically sensitive layer independent of the charge store. 55. The photodetector of claim 49, wherein the pixel circuit comprises a separation element coupled between the optically sensitive layer and the charge store. 56. The photodetector of claim 55, wherein the separation element includes a non-linear element. 57. The photodetector of claim 55, wherein the separation element includes a diode. 58. The photodetector of claim 55, wherein the separation element includes a switch. 59. The photodetector of claim 49, wherein the pixel circuit includes a readout element, the readout element coupled to the optically sensitive layer and operating independently of common connected devices of the pixel circuit and the optically sensitive material. 60. The photodetector of claim 59, wherein the readout element is a transistor. 61. The photodetector of claim 60, wherein the readout element operates as an amplifier. 62. The photodetector of claim 61, wherein the amplifier operates as a source follower. 63. The photodetector of claim 59, wherein the pixel circuitry includes at least one diode coupled to the optically sensitive layer. 64. The photodetector of claim 63, wherein the diode is an implicit diode. 65. The photodetector of claim 63, wherein the diode is a parasitic diode. 66. The photodetector of claim 63, wherein the diode resets the optically sensitive material. 67. The photodetector of claim 63, wherein the diode controls the readout element. 68. A photodetector comprising: a semiconductor substrate;a plurality of pixel regions over the semiconductor substrate, each pixel region comprising a respective first electrode, a respective second electrode and an optically sensitive layer between the first electrode and the second electrode;a pixel circuit for each pixel region, each pixel circuit comprising a charge store, a switching element between the charge store and the optically sensitive layer for the respective pixel region, and a read out circuit to sample a voltage from the charge store, the pixel circuit formed on the semiconductor substrate below the plurality of pixel regions; andcircuitry to switch the switching element for all of the pixel circuits at substantially the same time;wherein the distance between the respective first electrode and the respective second electrode for each respective pixel region is less than approximately 2 micrometers, and a top surface area of each pixel region is less than approximately 4 square micrometers;wherein each pixel circuit is formed on a region of the semiconductor substrate below the plurality of pixel regions having an area less than or equal to the top surface area of the corresponding pixel region; andwherein the area of the semiconductor substrate for each respective pixel circuit is positioned under a portion of the corresponding pixel region and a portion of another pixel region that is not in electrical communication with the respective pixel circuit. 69. The photodetector of claim 68, comprising a via between each respective pixel circuit and the corresponding pixel region. 70. The photodetector of claim 68, wherein each pixel region has a corresponding pixel circuit with dedicated read out circuit, wherein the dedicated read out circuit is separate from the read out circuit of the other pixel circuits.
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