High-nitrogen content metal resistor and method of forming same
IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0155801
(2011-06-08)
|
등록번호 |
US-8530320
(2013-09-10)
|
발명자
/ 주소 |
- Yang, Chih-Chao
- Edelstein, Daniel C.
|
출원인 / 주소 |
- International Business Machines Corporation
|
대리인 / 주소 |
Scully, Scott, Murphy & Presser, P.C.
|
인용정보 |
피인용 횟수 :
10 인용 특허 :
8 |
초록
▼
A thin film metal resistor is provided that includes an in-situ formed metal nitride layer that is formed in a lower region of a deposited metal nitride layer. The in-situ formed metal nitride layer, together with the overlying deposited metal nitride layer, from a thin film metal resistor which has
A thin film metal resistor is provided that includes an in-situ formed metal nitride layer that is formed in a lower region of a deposited metal nitride layer. The in-situ formed metal nitride layer, together with the overlying deposited metal nitride layer, from a thin film metal resistor which has a nitrogen content that is greater than 60 atomic % nitrogen. The in-situ formed metal nitride layer is present on a nitrogen enriched dielectric surface layer. In accordance with the present disclosure, the in-situ formed metal nitride layer is formed during and/or after formation of the deposited metal nitride layer by reacting metal atoms from the deposited metal nitride layer with nitrogen atoms present in the nitrogen enriched dielectric surface layer. The presence of the in-situ formed metal nitride layer in the lower region of the metal nitride layer provides a two-component metal resistor having greater than 60 atomic % nitrogen therein.
대표청구항
▼
1. A method of forming a metal resistor comprising: forming a nitrogen enriched dielectric surface layer within an upper region of a dielectric material layer; andforming a metal nitride layer on an upper surface of the nitrogen enriched dielectric surface layer, wherein during and/or after said for
1. A method of forming a metal resistor comprising: forming a nitrogen enriched dielectric surface layer within an upper region of a dielectric material layer; andforming a metal nitride layer on an upper surface of the nitrogen enriched dielectric surface layer, wherein during and/or after said forming the metal nitride layer, another metal nitride layer forms in-situ in a lower region of the metal nitride layer. 2. The method of claim 1, wherein said forming the nitrogen enriched dielectric surface layer comprises performing a thermal nitridation process. 3. The method of claim 2, wherein said thermal nitridation process is performed at a temperature from 50° C. to 450° C. 4. The method of claim 2, wherein said thermal nitridation is performed in a nitrogen-containing ambient, said nitrogen-containing ambient is selected from the group consisting of N2, NH3, NH4, NO, and NHx wherein x is between 0-1. 5. The method of claim 1, wherein said forming the nitrogen enriched dielectric surface layer comprises a plasma nitridation process. 6. The method of claim 5, wherein said plasma nitridation process is performed at a temperature from 50° C. to 450° C. 7. The method of claim 5, wherein said plasma nitridation process includes generating a plasma from a nitrogen-containing ambient, said nitrogen-containing ambient is selected from the group consisting of N2, NH3, NH4, NO, and NHx wherein x is between 0-1. 8. The method of claim 1, wherein said metal nitride layer and said another metal nitride layer comprise a bilayer resistor with a distinct interface located therebetween. 9. The method of claim 1, wherein said metal nitride layer and said another metal nitride layer provide a resistor having a graded nitrogen content. 10. The method of claim 1, wherein said metal nitride layer and said another metal nitride layer provide a resistor having greater than 60 atomic % nitrogen located therein. 11. The method of claim 1, wherein said another metal nitride layer forms by reacting metal atoms from said metal nitride layer with nitrogen atoms from said nitrogen enriched dielectric surface layer. 12. The method of claim 1, further comprising forming a dielectric capping layer atop the metal nitride layer, and patterning the dielectric capping layer, the metal nitride layer and the another metal nitride layer. 13. A method of integrating a resistor within an interconnect structure comprising: providing a first dielectric material layer having at least one conductive material embedded therein;forming a dielectric capping layer atop the first dielectric material layer and atop the at least one conductive material;forming a second dielectric material layer atop the dielectric capping layer;forming a nitrogen enriched dielectric surface layer within an upper region of the second dielectric material layer;forming a metal nitride layer atop the nitrogen enriched dielectric surface layer, wherein during and/or after the forming of the metal nitride layer, another metal nitride layer forms in-situ in a lower region of the metal nitride layer;forming another dielectric capping layer atop the metal nitride layer;patterning the another dielectric capping layer, the metal nitride layer and the another metal nitride layer to form a patterned material stack; andforming a third dielectric material layer having a plurality of conductive structures embedded therein atop the exposed nitrogen enriched dielectric surface layer and said patterned material stack. 14. The method of claim 13, wherein said forming the nitrogen enriched dielectric surface layer comprises performing a thermal nitridation process or performing a plasma nitridation process.
이 특허에 인용된 특허 (8)
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Yang, Chih-Chao; Edelstein, Daniel C.; Molis, Steven E., Enhanced diffusion barrier for interconnect structures.
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Narwankar, Pravin; Sahin, Turgut, Method and apparatus for integrating a metal nitride film in a semiconductor device.
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Pravin Narwankar ; Turgut Sahin, Method and apparatus for integrating a metal nitride film in a semiconductor device.
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Alers Glenn B., Method for making field effect devices and capacitors with improved thin film dielectrics and resulting devices.
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Dunn Gregory J. ; Savic Jovica ; Beuhler Allyson, Method for manufacturing an integral thin-film metal resistor.
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Lee Jia-Sheng,TWX, Method for manufacturing thin-film resistor.
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Segawa Mizuki,JPX ; Yabu Toshiki,JPX ; Matsuzawa Akira,JPX, Method of manufacturing semiconductor device having resistor film.
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Morris Frank J. (Plano TX), Thin film resistor and method for manufacturing the same.
이 특허를 인용한 특허 (10)
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Edelstein, Daniel C; Yang, Chih-Chao, Advanced through substrate via metallization in three dimensional semiconductor integration.
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Edelstein, Daniel C; Yang, Chih-Chao, Formation of liner and metal conductor.
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Ferrer, Domingo A.; Kohli, Kriteshwar K.; Krishnan, Siddarth A.; Shepard, Jr., Joseph F.; Wong, Keith Kwong Hon, Modified tungsten silicon.
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Edelstein, Daniel C.; Yang, Chih-Chao, Simultaneous formation of liner and metal conductor.
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Edelstein, Daniel C; Yang, Chih-Chao, Simultaneous formation of liner and metal conductor.
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Edelstein, Daniel C; Yang, Chih-Chao, Simultaneous formation of liner and metal conductor.
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Edelstein, Daniel C; Yang, Chih-Chao, Simultaneous formation of liner and metal conductor.
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Edelstein, Daniel C; Yang, Chih-Chao, Simultaneous formation of liner and metal conductor.
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Edelstein, Daniel C; Yang, Chih-Chao, Simultaneous formation of liner and metal conductor.
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Yang, Chih-Chao, Thin film metallic resistors formed by surface treatment of insulating layer.
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