IPC분류정보
국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0020849
(2011-02-04)
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등록번호 |
US-8536448
(2013-09-17)
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발명자
/ 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
The Mueller Law Office, P.C.
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인용정보 |
피인용 횟수 :
0 인용 특허 :
8 |
초록
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A structure to provide a Zener diode to avoid shunt formation is disclosed. An undoped or lightly doped monocrystalline thin semiconductor lamina is cleaved from a donor body which is not permanently affixed to a support element. The lamina may be annealed at high temperature to remove damage from a
A structure to provide a Zener diode to avoid shunt formation is disclosed. An undoped or lightly doped monocrystalline thin semiconductor lamina is cleaved from a donor body which is not permanently affixed to a support element. The lamina may be annealed at high temperature to remove damage from a prior implant. At least one aperture is formed through the lamina, either due to flaws in the cleaving process, or intentionally following cleaving. Heavily doped amorphous silicon layers having opposite conductivity types are deposited on opposite faces of the lamina, one forming the emitter and one a base contact to a photovoltaic cell, while the lamina forms the base of the cell. The heavily doped layers contact in the aperture, forming a Zener diode. This Zener diode prevents formation of shunts, and may behave as a bypass diode if the cell is placed under heavy reverse bias, as when one cell in a series string is shaded while the rest of the string is exposed to sun.
대표청구항
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1. A structure to prevent electrical shunting, the structure comprising: a monocrystalline semiconductor lamina having a first surface and a second surface opposite the first, and having a thickness between the first surface and the second surface less than about 50 microns;a first amorphous silicon
1. A structure to prevent electrical shunting, the structure comprising: a monocrystalline semiconductor lamina having a first surface and a second surface opposite the first, and having a thickness between the first surface and the second surface less than about 50 microns;a first amorphous silicon layer on and in contact with the first surface, at least a portion of the first amorphous silicon layer heavily doped to a first conductivity type;a second amorphous silicon layer on and in contact with the second surface, at least a portion of the second amorphous silicon layer heavily doped to a second conductivity type, opposite the first conductivity type;a first contact in electrical contact with the first amorphous silicon layer; anda second contact in electrical contact with the second amorphous silicon layer, whereinthe first amorphous silicon layer directly contacts the second amorphous silicon layer through an aperture in the lamina, forming a Zener diode,the lamina comprises a base region of a photovoltaic cell,the aperture in the lamina does not correspond to an aperture in either the first or the second amorphous silicon layer, andin normal operation of the device, the second amorphous silicon layer is not in ohmic contact with the first contact. 2. The structure of claim 1 wherein the first amorphous silicon layer or the second amorphous silicon layer comprises an emitter of the photovoltaic cell. 3. The structure of claim 1 wherein the lamina is undoped or lightly or moderately doped silicon. 4. The structure of claim 1 wherein the lamina has a thickness between about 3 and about 20 microns. 5. The structure of claim 4 wherein the lamina has a thickness between about 4 and about 12 microns. 6. The structure of claim 1 wherein the lamina is disposed between the first contact and the second contact. 7. The structure of claim 1 wherein the first amorphous silicon layer consists of a first thickness of intrinsic amorphous silicon and a second thickness of heavily doped amorphous silicon. 8. The structure of claim 1 wherein the second amorphous silicon layer consists of a first thickness of intrinsic amorphous silicon and a second thickness of heavily doped amorphous silicon. 9. The structure of claim 1 wherein, during normal operation of the photovoltaic cell, voltage across the Zener diode is below its turn-on voltage. 10. The structure of claim 1 wherein the Zener diode is electrically between the first contact and the second amorphous silicon layer. 11. The structure of claim 1 wherein at least a portion of the first heavily doped amorphous layer is doped to at least 1018 atoms/cc3, and wherein at least a portion of the second heavily doped amorphous layer is doped to at least 1018 atoms/cc3. 12. The structure of claim 1 wherein, during normal operation of the cell, incident light first enters the lamina at the first surface, and wherein at least fifty percent of the first surface is textured, the texture having a peak-to-valley height between about 3000 angstroms and about 1 micron. 13. A photovoltaic cell comprising: a monocrystalline silicon lamina having a thickness between about 2 and about 20 microns, the lamina having a first surface and a second surface opposite the first, the lamina comprising a base region of the photovoltaic cell;a first amorphous silicon layer on and in contact with the first surface, wherein at least half a thickness of the first amorphous silicon layer is heavily doped to a first conductivity type;a second amorphous silicon layer on and in contact with the first surface, wherein at least half a thickness of the second amorphous silicon layer is heavily doped to a second conductivity type opposite the first;a first contact in electrical contact with the first amorphous silicon layer; anda second contact in electrical contact with the second amorphous silicon layer, whereinthe second amorphous silicon layer lines the sidewalls of an aperture in the lamina, andthe first amorphous silicon layer does not line the sidewalls of the aperture in the lamina, and does not have a corresponding aperture aligned with the aperture in the lamina, andthe first amorphous silicon layer and the second amorphous silicon layer are in direct contact through the aperture, forming a Zener diode, andwherein, during normal operation of the photovoltaic cell, the second amorphous silicon layer is not in ohmic contact with the first contact. 14. The photovoltaic cell of claim 13 wherein the first amorphous silicon layer or the second amorphous silicon layer comprises an emitter of the photovoltaic cell. 15. The photovoltaic cell of claim 13 wherein the first amorphous silicon layer comprises the emitter of the photovoltaic cell, and wherein incident light first enters the lamina at the first surface. 16. The photovoltaic cell of claim 13 wherein either the first surface or the second surface is a light-facing surface, and wherein at least fifty percent of the light-facing surface is textured, the texture having a peak-to-valley height between about 3000 angstroms and about 1 micron. 17. The photovoltaic cell of claim 13 wherein, during normal operation of the cell, voltage across the Zener diode is below its turn-on voltage. 18. The photovoltaic cell of claim 13 wherein the photovoltaic cell is permanently affixed to a metal support element.
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