|국가/구분||United States(US) Patent 등록|
|미국특허분류(USC)||712/015; 712/029; 712/039; 712/232; 712/041|
|발명자 / 주소|
|출원인 / 주소|
|대리인 / 주소||
|인용정보||피인용 횟수 : 2 인용 특허 : 436|
The present invention concerns a new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing. The preferred IC embodiment includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfigura...
1. An adaptive computing engine, comprising: a configurable logic unit comprising a first plurality of heterogeneous computational elements and a first interconnection network coupling the first plurality of heterogeneous computational elements to each other, the first plurality of heterogeneous computational elements comprising a first type of heterogeneous computational element for performing a first operation and a second type of heterogeneous computational element for performing a second, operation, wherein the second operation is different from the ...