IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0103459
(2011-05-09)
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등록번호 |
US-8569161
(2013-10-29)
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발명자
/ 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 |
피인용 횟수 :
0 인용 특허 :
8 |
초록
▼
Semiconductor devices with external wirebond sites that include copper and methods for fabricating such semiconductor devices are disclosed. One embodiment of a method for fabricating a semiconductor device comprises forming a dielectric layer on an active side of a semiconductor substrate. The diel
Semiconductor devices with external wirebond sites that include copper and methods for fabricating such semiconductor devices are disclosed. One embodiment of a method for fabricating a semiconductor device comprises forming a dielectric layer on an active side of a semiconductor substrate. The dielectric layer has openings aligned with corresponding wirebond sites at the active side of the substrate. The method further includes forming a plurality of wirebond sites located at the openings in the dielectric layer. The wirebond sites are electrically coupled to an integrated circuit in the semiconductor substrate and electrically isolated from each other. Individual wirebond sites are formed by electrolessly depositing nickel into the openings and forming a wirebond film on the nickel without forming a seam between the nickel and the dielectric layer.
대표청구항
▼
1. A method of fabricating a semiconductor device, comprising: forming a dielectric layer on an active side of a semiconductor substrate, wherein the dielectric layer has openings at least partially aligned with corresponding copper terminals at the active side of the substrate, and wherein the copp
1. A method of fabricating a semiconductor device, comprising: forming a dielectric layer on an active side of a semiconductor substrate, wherein the dielectric layer has openings at least partially aligned with corresponding copper terminals at the active side of the substrate, and wherein the copper terminals are electrically coupled to an integrated circuit in the substrate;depositing a liner on the dielectric layer and the copper terminals;depositing a copper layer on the liner;removing portions of the liner and the copper layer until the dielectric layer is exposed in areas between the openings, wherein adhesion elements having discrete portions of the liner and copper deposits remain in individual openings, and wherein the individual adhesion elements each include a depression at least partially extending into the corresponding opening of the dielectric material;forming individual nickel deposits on the corresponding adhesion elements, wherein the individual nickel deposits at least substantially fill the depressions in the adhesion elements;forming individual wirebond films on corresponding nickel deposits, wherein the individual nickel deposits each have a volume in the depression greater than that of the wirebond film in the depression, and wherein the wirebond films and the nickel deposits define wirebond elements that are electrically isolated from each other; andattaching wirebonds to corresponding wirebond films. 2. The method of claim 1 wherein depositing a liner comprises depositing tantalum using chemical vapor deposition, and wherein depositing a copper layer on the liner comprises depositing copper using physical vapor deposition. 3. The method of claim 1 wherein removing portions of the liner and the copper layer comprises rubbing an abrasive medium against the copper layer and the liner until the top portion of the dielectric layer is exposed. 4. The method of claim 1 wherein forming individual wirebond films comprises electrolessly plating one of gold or palladium onto the nickel deposits. 5. A method of fabricating a semiconductor device, comprising: forming a dielectric layer on an active side of a semiconductor substrate, wherein the dielectric layer has openings aligned with corresponding wirebond sites at the active side of the substrate; andforming a plurality of wirebond sites located at the openings in the dielectric layer, wherein the wirebond sites are electrically coupled to an integrated circuit in the semiconductor substrate and electrically isolated from each other, and wherein forming the individual wirebond sites comprises— depositing a conductive liner onto the dielectric layer and into the openings,depositing a copper layer onto the liner, wherein the copper layer includes a depression that extends at least partially into the opening of the dielectric layer,electrolessly depositing nickel into the depressions such that the nickel at least substantially fills the depressions, andforming a wirebond film on the nickel without forming a seam between the nickel and the dielectric layer, wherein there is more nickel than wirebond film in the depression. 6. The method of claim 5 wherein before electrolessly depositing the nickel, the process of forming the wirebond sites further comprises electrically isolating portions of the liner and the copper layer in the openings of the dielectric layer. 7. The method of claim 6 wherein electrically isolating portions of the liner and the copper layer in the openings of the dielectric layer comprises planarizing the device to remove an overburden portion of the liner and copper layer until the dielectric layer is exposed. 8. The method of claim 7 wherein depositing the liner comprises vapor deposition of at least one of tantalum, tantalum nitride, titanium, and titanium nitride, and wherein depositing the copper layer comprises physical vapor deposition of copper. 9. The method of claim 6 wherein depositing the copper layer comprises physical vapor deposition of copper onto the conductive liner. 10. The method of claim 5 wherein forming the wirebond film comprises depositing at least one of gold, silver, palladium and aluminum onto the nickel. 11. The method of claim 10 wherein forming the wirebond film comprises an electroless plating process. 12. A method of fabricating a semiconductor device, comprising: forming a dielectric material on an active side of a semiconductor substrate, wherein the dielectric material has openings generally aligned with copper terminals at the active side of the substrate, and wherein the copper terminals are electrically coupled to an integrated circuit in the substrate;forming a plurality of adhesion elements in the openings of the dielectric material and electrically coupled to the corresponding copper terminals, wherein the individual adhesion elements include a depression extending at least partially into the corresponding opening in the dielectric material; andforming a plurality of wirebond elements on the adhesion elements, wherein the individual wirebond elements include a nickel deposit at least substantially filling the depression in the corresponding adhesion element and a wirebond film on the nickel deposit, wherein at least a portion of the wirebond film is in the depression, and wherein there is more nickel than wirebond film in the depression. 13. The method of claim 12 wherein forming the plurality of adhesion elements comprises: forming a conductive liner on the dielectric material and in the openings;forming a copper deposit on the conductive liner; andelectrically isolating portions of the conductive liner and the copper deposit in the openings of the dielectric layer before forming the wirebond elements. 14. The method of claim 12, further comprising forming apertures in the adhesion elements at the copper terminals, and wherein forming the plurality of wirebond elements comprises contacting portions of the individual wirebond elements with the corresponding copper terminals. 15. The method of claim 12 wherein forming the plurality of wirebond elements comprises electrolessly plating nickel to the adhesion elements in the depressions. 16. The method of claim 12 wherein forming the plurality of adhesion elements comprises forming a liner on the dielectric material and in the openings, wherein the liner comprises at least one of one of tantalum, tantalum nitride, titanium, and titanium nitride. 17. The method of claim 12 wherein the wirebond film comprises at least one of gold, silver, palladium, and aluminum.
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