IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0370115
(2012-02-09)
|
등록번호 |
US-8584106
(2013-11-12)
|
발명자
/ 주소 |
- Papakipos, Matthew N.
- Grant, Brian K.
- Demetriou, Christopher G.
- McGuire, Morgan S.
|
출원인 / 주소 |
|
대리인 / 주소 |
Morgan, Lewis & Bockius LLP
|
인용정보 |
피인용 횟수 :
9 인용 특허 :
46 |
초록
▼
A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-in
A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
대표청구항
▼
1. A computer-implemented method, comprising: at a parallel-processing computer system with first and second processing elements, each having a different instruction set architecture:at run-time, while the application is executing, receiving one or more operation requests from an application;prepari
1. A computer-implemented method, comprising: at a parallel-processing computer system with first and second processing elements, each having a different instruction set architecture:at run-time, while the application is executing, receiving one or more operation requests from an application;preparing an intermediate representation for the operation requests;preparing a set of compute kernels for the intermediate representation, by: compiling one or more compute kernels for a first portion of the intermediate representation for execution on the first processing element;searching a set of previously compiled compute kernels to determine whether a second portion of the intermediate representation has been previously compiled; andselecting one or more previously compiled compute kernels for execution on the second processing element, the selected compute kernels having been compiled for execution on the second processing element; andexecuting the set of compute kernels on the first and second processing elements; andwherein the first and the second processing elements are selected from a group consisting of: single-core central processing units, multi-core central processing units, graphics processing units, single-core co-processors and multi-core co-processors. 2. The method of claim 1, wherein the operation requests correspond to an application program interface function call in the application. 3. The method of claim 1, wherein the operation requests correspond to a code segment written in a specific programming language in the application. 4. The method of claim 1, further comprising writing results of the execution into shared system memory accessible to the first and second processing elements and the application. 5. A computer-implemented method, comprising: at a parallel-processing computer system with first and second processing elements, each having a different instruction set architecture:at compile-time, identifying one or more operation requests in an application source code;preparing an intermediate representation for the operation requests;at run-time, while the application is executing, preparing a set of compute kernels for the intermediate representation, by: compiling one or more compute kernels for a first portion of the intermediate representation for execution on the first processing element;searching a set of previously compiled compute kernels to determine whether a second portion of the intermediate representation has been previously compiled; andselecting one or more previously compiled compute kernels for execution on the second processing element, the selected compute kernels having been compiled for execution on the second processing element; andexecuting the set of compute kernels on the first and second processing elements; andwherein the first and second processing elements are selected from a group consisting of: single-core central processing units, multi-core central processing units, graphics processing units, single-core co-processors and multi-core coprocessors. 6. The method of claim 5, wherein the operation requests in the application source code correspond to an application program interface function call. 7. The method of claim 5, wherein the operation requests in the application source code correspond to a code segment written in a specific programming language. 8. The method of claim 5, further comprising, at compile-time, applying loop analysis to the intermediate representation. 9. The method of claim 5, further comprising writing results of the execution into shared system memory accessible to the first and second processing elements and the application. 10. A parallel-processing computer system, comprising: memory;a first and a second processing element, each having a different instruction set architecture; andat least one program stored in the memory to be executed by the multiple processing elements, the at least one program comprising instructions for:at run-time, while the application is executing, receiving one or more operation requests from an application;preparing an intermediate representation for the operation requests;preparing a set of compute kernels for the intermediate representation, by: compiling one or more compute kernels for a first portion of the intermediate representation for execution on the first processing element;searching a set of previously compiled compute kernels to determine whether a second portion of the intermediate representation has been previously compiled; andselecting one or more previously compiled compute kernels for execution on the second processing element, the selected compute kernels having been compiled for execution on the second processing element; andexecuting the set of compute kernels on the first and second processing elements; andwherein the first and second processing elements are selected from a group consisting of: single-core central processing units, multi-core central processing units, graphics processing units, single-core co-processors and multi-core coprocessors. 11. The computer system of claim 10, wherein the operation requests correspond to an application program interface function call in the application. 12. The computer system of claim 10, wherein the operation requests correspond to a code segment written in a specific programming language in the application. 13. The computer system of claim 10, further comprising writing results of the execution into shared system memory accessible to the first and second processing elements and the application. 14. A parallel-processing computer system, comprising: memory;a first and a second processing element, each having a different instruction set architecture; andat least one program stored in the memory to be executed by the multiple processing elements, the at least one program comprising instructions for:at compile-time, identifying one or more operation requests in an application source code;preparing an intermediate representation for the operation requests;at run-time, while the application is executing, preparing a set of compute kernels for the intermediate representation, by: compiling one or more compute kernels for a first portion of the intermediate representation for execution on the first processing element;searching a set of previously compiled compute kernels to determine whether a second portion of the intermediate representation has been previously compiled; andselecting one or more previously compiled compute kernels for execution on the second processing element, the selected compute kernels having been compiled for execution on the second processing element; andexecuting the set of compute kernels on the first and second processing elements; andwherein the first and second processing elements are selected from a group consisting of: single-core central processing units, multi-core central processing units, graphics processing units, single-core co-processors and multi-core coprocessors. 15. The computer system of claim 14, wherein the operation requests correspond to an application program interface function call in the application. 16. The computer system of claim 14, wherein the operation requests correspond to a code segment written in a specific programming language in the application. 17. The computer system of claim 14, further comprising writing results of the execution into shared system memory accessible to the first and second processing elements and the application. 18. A non-transitory computer readable storage medium storing one or more programs configured to be executed by a parallel-processing computer system with a first and a second processing element, each having a different instruction set architecture, the one or more programs comprising instructions for: at run-time, while the application is executing, receiving one or more operation requests from an application;preparing an intermediate representation for the operation requests;preparing a set of compute kernels for the intermediate representation, by: compiling one or more compute kernels for a first portion of the intermediate representation for execution on the first processing element;searching a set of previously compiled compute kernels to determine whether a second portion of the intermediate representation has been previously compiled; andselecting one or more previously compiled compute kernels for execution on the second processing element, the selected compute kernels having been compiled for execution on the second processing element; andexecuting the set of compute kernels on the first and second processing elements processing elements of the parallel-processing computer system; andwherein the first and second processing elements are selected from a group consisting of: single-core central processing units, multi-core central processing units, graphics processing units, single-core co-processors and multi-core coprocessors. 19. The non-transitory computer readable storage medium of claim 18, wherein the operation requests correspond to an application program interface function call in the application. 20. The non-transitory computer readable storage medium of claim 18, wherein the operation requests correspond to a code segment written in a specific programming language in the application. 21. The non-transitory computer readable storage medium of claim 18, further comprising writing results of the execution into shared system memory accessible to the first and second processing elements and the application. 22. A non-transitory computer readable storage medium storing one or more programs configured to be executed by a parallel-processing computer system with a first and a second processing element, each having a different instruction set architecture, the one or more programs comprising instructions for: at compile-time, identifying one or more operation requests in an application source code;preparing an intermediate representation for the operation requests;at run-time, while the application is executing, preparing a set of compute kernels for the intermediate representation, by: compiling one or more compute kernels for a first portion of the intermediate representation for execution on the first processing element;searching a set of previously compiled compute kernels to determine whether a second portion of the intermediate representation has been previously compiled; andselecting one or more previously compiled compute kernels for execution on the second processing element, the selected compute kernels having been compiled for execution on the second processing element; andexecuting the set of compute kernels on the first and second processing elements; andwherein the first and second processing elements are selected from a group consisting of: single-core central processing units, multi-core central processing units, graphics processing units, single-core co-processors and multi-core coprocessors. 23. The non-transitory computer readable storage medium of claim 22, wherein the operation requests correspond to an application program interface function call in the application. 24. The non-transitory computer readable storage medium of claim 22, wherein the operation requests correspond to a code segment written in a specific programming language in the application. 25. The non-transitory computer readable storage medium of claim 22, further comprising writing results of the execution into shared system memory accessible to the first and second processing elements and the application.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.