A current source regulator for controlling an output device (Mp) of current source, the output device (Mp) providing an output current (Isrc) to a load. The current source regulator comprises a first feedback loop (1) and second feedback loop (2). The first feedback loop (1) includes a first sensing
A current source regulator for controlling an output device (Mp) of current source, the output device (Mp) providing an output current (Isrc) to a load. The current source regulator comprises a first feedback loop (1) and second feedback loop (2). The first feedback loop (1) includes a first sensing path to provide a first sensing signal (Is1) for comparison with a first reference to generate a first control signal. The second feedback loop (2) comprises a second sensing path to provide a second sensing signal (Is3, Is3′) for comparison with a second reference (Ib5) to generate a charging current signal (Icharge). The charging current signal (Icharge) is applied to the control signal during a transient state of the current source regulator.
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1. A current source regulator for controlling an output device of a current source, the output device providing an output current to an output terminal, to which a load is connected, in response to a signal at a common node, the current source regulator comprising: a first feedback loop to provide a
1. A current source regulator for controlling an output device of a current source, the output device providing an output current to an output terminal, to which a load is connected, in response to a signal at a common node, the current source regulator comprising: a first feedback loop to provide a first control signal to the common node, said first feedback loop having a first sensing path to provide a first sensing signal for a comparison with a first reference for generating the first control signal;a second feedback loop having a second sensing path to provide a second sensing signal for a comparison with a second reference to generate a charging current signal, said charging current signal being applied to the common node during a transient state of the current source regulator,wherein the second feedback loop comprises a comparator assembly configured to provide the charging current signal, and wherein the charging current signal is based in part on a difference between the second reference and the second sensing signal times a constant when the second sensing signal times the constant does not exceed the second reference, and the charging current signal is zero when the second sensing signal times the constant exceeds the second reference. 2. The current source regulator according to claim 1, wherein the first feedback loop comprises a level shifter, said level shifter arranged between a comparator of the first feedback loop and the common node to which the charging current signal is applied. 3. The current source regulator according to claim 1, further comprising a voltage equalizing network having a current mirror, which is arranged in the first sensing path and the second sensing path to equalize a voltage in the first sensing path and the second sensing path to an output load voltage. 4. The current source regulator according to claim 1, wherein at least one of the first sensing path or the second sensing path comprises a sensing transistor, wherein a gate of the sensing transistor is coupled to the common node of the first and second feedback loop. 5. The current source regulator according to claim 1, wherein at least one of the first sensing signal or the second sensing signal is a current sensing signal. 6. The current source regulator according to claim 1, wherein the first sensing path, the second sensing path, and the output device are coupled to a common supply terminal. 7. The current source regulator according to claim 1, wherein the first feedback loop comprises a current path comprising a first current source and a second current source connected in series and a first node and a second node in between, wherein the first node is coupled to the first sensing path and the second node is coupled to the output device. 8. The current source regulator according to claim 7, wherein a bias device is arranged between the first and the second nodes. 9. The current source regulator according to claim 7, further comprising a third current source connected with the common node and adopted to provide a current smaller than a current of the second current source. 10. The current source regulator according to claim 9, wherein the third current source is configured to provide a current smaller than a current of the second current source. 11. The current source regulator according to claim 1, wherein the comparator assembly comprises: a reference current source; anda differential amplifier arranged between the reference current source and a ground terminal. 12. The current source regulator according to claim 11, wherein an input transistor of the amplifier is coupled to a current mirror transistor, mirroring the second sensing current. 13. The current source regulator according to claim 11, wherein a gate of an output transistor of the amplifier is coupled to a common supply node, said node connected to the reference current source. 14. The current source regulator according to claim 1, wherein the comparator assembly comprises: an input current mirror to mirror the second sensing signal; andan output current mirror to mirror a comparison result of a comparison of the mirrored second sensing signal and the second reference to generate the charging current signal. 15. The current source regulator according to claim 1, wherein the comparator assembly includes a reference current source providing the second reference. 16. The current source regulator according to claim 1, wherein the first and second references are fixed.
Wellnitz Keith M. (Chandler AZ) Wollschlager Randall T. (Chandler AZ) Hargedon John (Norwood MA), Clamp circuit and method for detecting an activation of same.
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